[gcc r12-8667] Do not enable -mblock-ops-vector-pair.

[gcc r12-8667] Do not enable -mblock-ops-vector-pair.

[Michael Meissner]

https://gcc.gnu.org/g:25b11619a83f424073aca93422c832b1ac4756fb

commit r12-8667-g25b11619a83f424073aca93422c832b1ac4756fb
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Aug 5 18:54:33 2022 -0400

    Do not enable -mblock-ops-vector-pair.
    
    Testing has shown that using the load vector pair and store vector pair
    instructions for block moves has some performance issues on power10.
    
    A patch on June 11th modified the code so that GCC would not set
    -mblock-ops-vector-pair by default if we are tuning for power10, but it would
    set the option if we were tuning for a different machine and have load and store
    vector pair instructions enabled.
    
    This patch eliminates the code setting -mblock-ops-vector-pair.  If you want to
    generate load vector pair and store vector pair instructions for block moves,
    you must use -mblock-ops-vector-pair.
    
    2022-08-05   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove code
            setting -mblock-ops-vector-pair.  Back port patch from trunk on 8/3.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 11 -----------
 1 file changed, 11 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 040487bd277..1aadd2b96b8 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4149,17 +4149,6 @@ rs6000_option_override_internal (bool global_init_p)
 	rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX;
     }
 
-  if (!(rs6000_isa_flags_explicit & OPTION_MASK_BLOCK_OPS_VECTOR_PAIR))
-    {
-      /* Do not generate lxvp and stxvp on power10 since there are some
-	 performance issues.  */
-      if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX
-	  && rs6000_tune != PROCESSOR_POWER10)
-	rs6000_isa_flags |= OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;
-      else
-	rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;
-    }
-
   /* Use long double size to select the appropriate long double.  We use
      TYPE_PRECISION to differentiate the 3 different long double types.  We map
      128 into the precision used for TFmode.  */