[gcc(refs/vendors/ARM/heads/arm-12)] [Committed] arm: Document +no options for Cortex-M55 CPU.

[SRINATH PARVATHANENI <sripar01@gcc.gnu.org>]

https://gcc.gnu.org/g:32f3f0dcf5c6b3e1fcc4d61f7fb438f1d7ff2dc0

commit 32f3f0dcf5c6b3e1fcc4d61f7fb438f1d7ff2dc0
Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Date:   Fri Aug 12 20:47:24 2022 +0100

    [Committed] arm: Document +no options for Cortex-M55 CPU.
    
    Hi,
    
    This patch documents the following options for Arm Cortex-M55 CPU under -mcpu= list.
    
    +nomve.fp (disables MVE single precision floating point instructions)
    +nomve (disables MVE integer and single precision floating point instructions)
    +nodsp (disables dsp, MVE integer and single precision floating point instructions)
    +nofp (disables floating point instructions)
    
    Committed as obvious to master.
    
    Regards,
    Srinath.
    
    gcc/ChangeLog:
    
    2022-08-12  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
    
             * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55 options.

Diff:
---
 gcc/doc/invoke.texi | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b6c7bcca58a..93ce6f89725 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21151,14 +21151,25 @@ The following extension options are common to the listed CPUs:
 
 @table @samp
 @item +nodsp
-Disable the DSP instructions on @samp{cortex-m33}, @samp{cortex-m35p}.
+Disable the DSP instructions on @samp{cortex-m33}, @samp{cortex-m35p}
+and @samp{cortex-m55}. Also disable the M-Profile Vector Extension (MVE)
+integer and single precision floating-point instructions on @samp{cortex-m55}.
+
+@item +nomve
+Disable the M-Profile Vector Extension (MVE) integer and single precision
+floating-point instructions on @samp{cortex-m55}.
+
+@item +nomve.fp
+Disable the M-Profile Vector Extension (MVE) single precision floating-point
+instructions on @samp{cortex-m55}.
 
 @item  +nofp
 Disables the floating-point instructions on @samp{arm9e},
 @samp{arm946e-s}, @samp{arm966e-s}, @samp{arm968e-s}, @samp{arm10e},
 @samp{arm1020e}, @samp{arm1022e}, @samp{arm926ej-s},
 @samp{arm1026ej-s}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8},
-@samp{cortex-m4}, @samp{cortex-m7}, @samp{cortex-m33} and @samp{cortex-m35p}.
+@samp{cortex-m4}, @samp{cortex-m7}, @samp{cortex-m33}, @samp{cortex-m35p}
+and @samp{cortex-m55}.
 Disables the floating-point and SIMD instructions on
 @samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7},
 @samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a12},