From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7810) id 8817C3854158; Wed, 24 Aug 2022 13:29:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8817C3854158 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1661347748; bh=b7QBpFkKQGyxZ3Q1nk93kbQzcuSUNm4eil3mZU+cUB0=; h=From:To:Subject:Date:From; b=Zg/5bn0wempnQCv4Z02QhNKvYHl8g97L4Vn5086qRIlXtho6LA3qMb7RMl3elZ97C VCpyjSNn9JLJi+hmT0eU2pcL2eckrv0Gj4vmss0RkrBm4+2vFXJtj25e+kQKWAGaeD dzx22d3X9jGPPBNV2GR/DvDb5BySIchxHWB5HQ2c= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Alex Coplan To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/ARM/heads/morello)] lra: Update emit_inc for capabilities X-Act-Checkin: gcc X-Git-Author: Alex Coplan X-Git-Refname: refs/vendors/ARM/heads/morello X-Git-Oldrev: ec6e1327c229b91f5339c99603212e005b0b5a43 X-Git-Newrev: 971537e50aeeeee943db5731ea194a940ee1da57 Message-Id: <20220824132908.8817C3854158@sourceware.org> Date: Wed, 24 Aug 2022 13:29:08 +0000 (GMT) List-Id: https://gcc.gnu.org/g:971537e50aeeeee943db5731ea194a940ee1da57 commit 971537e50aeeeee943db5731ea194a940ee1da57 Author: Alex Coplan Date: Wed Aug 10 11:01:07 2022 +0100 lra: Update emit_inc for capabilities This change updates lra-constraints.c:emit_inc to handle capabilities. Allow pointer_plus in modify rtxes and use the correct mode for offsets. Diff: --- gcc/lra-constraints.c | 10 +++++----- .../gcc.target/aarch64/morello/lra-emit-inc-ice.c | 15 +++++++++++++++ 2 files changed, 20 insertions(+), 5 deletions(-) diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 54753b54d0d..5a6f76799bb 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -3676,10 +3676,10 @@ emit_inc (enum reg_class new_rclass, rtx in, rtx value, poly_int64 inc_amount) if (GET_CODE (value) == PRE_MODIFY || GET_CODE (value) == POST_MODIFY) { - lra_assert (GET_CODE (XEXP (value, 1)) == PLUS + lra_assert (any_plus_p (XEXP (value, 1)) || GET_CODE (XEXP (value, 1)) == MINUS); lra_assert (rtx_equal_p (XEXP (XEXP (value, 1), 0), XEXP (value, 0))); - plus_p = GET_CODE (XEXP (value, 1)) == PLUS; + plus_p = any_plus_p (XEXP (value, 1)); inc = XEXP (XEXP (value, 1), 1); } else @@ -3687,7 +3687,7 @@ emit_inc (enum reg_class new_rclass, rtx in, rtx value, poly_int64 inc_amount) if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC) inc_amount = -inc_amount; - inc = gen_int_mode (inc_amount, GET_MODE (value)); + inc = gen_int_mode (inc_amount, noncapability_mode (GET_MODE (value))); } if (! post && REG_P (incloc)) @@ -3764,10 +3764,10 @@ emit_inc (enum reg_class new_rclass, rtx in, rtx value, poly_int64 inc_amount) if (plus_p) { poly_int64 offset; + machine_mode om = noncapability_mode (GET_MODE (result)); if (poly_int_rtx_p (inc, &offset)) emit_insn (gen_add2_insn (result, - gen_int_mode (-offset, - GET_MODE (result)))); + gen_int_mode (-offset, om))); else emit_insn (gen_sub2_insn (result, inc)); } diff --git a/gcc/testsuite/gcc.target/aarch64/morello/lra-emit-inc-ice.c b/gcc/testsuite/gcc.target/aarch64/morello/lra-emit-inc-ice.c new file mode 100644 index 00000000000..64a8e734898 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/morello/lra-emit-inc-ice.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +enum { a, b, c }; +typedef float vec[3]; +struct S { + vec d,e; +}; +struct { + short i; + struct S s; +} * q; +void f(void) { + struct S *p = &q->s; + p->d[a] = p->d[b] = p->d[c] = p->e[a] = 0; + p->e[c] = 0; +}