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From: Thomas Schwinge <tschwinge@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r11-10255] nvptx: Define (dummy) 'TARGET_PTX_6_0'
Date: Wed, 14 Sep 2022 10:08:56 +0000 (GMT)	[thread overview]
Message-ID: <20220914100856.6CF6B3858C2C@sourceware.org> (raw)

https://gcc.gnu.org/g:5549f6631b3d255af18375aa80712f263ed5fd66

commit r11-10255-g5549f6631b3d255af18375aa80712f263ed5fd66
Author: Thomas Schwinge <thomas@codesourcery.com>
Date:   Tue Sep 13 17:26:33 2022 +0200

    nvptx: Define (dummy) 'TARGET_PTX_6_0'
    
    'TARGET_PTX_*' not applicable before GCC 12, but makes it easier to cherry-pick
    patches.
    
            gcc/
            * config/nvptx/nvptx.h (TARGET_PTX_6_0): '#define' to 'false'.

Diff:
---
 gcc/config/nvptx/nvptx.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/config/nvptx/nvptx.h b/gcc/config/nvptx/nvptx.h
index 2451703e77f..3273ad86673 100644
--- a/gcc/config/nvptx/nvptx.h
+++ b/gcc/config/nvptx/nvptx.h
@@ -98,6 +98,9 @@
 
 #define TARGET_SM35 (ptx_isa_option >= PTX_ISA_SM35)
 
+/* 'TARGET_PTX_*' not applicable before GCC 12.  */
+#define TARGET_PTX_6_0 false
+
 /* Registers.  Since ptx is a virtual target, we just define a few
    hard registers for special purposes and leave pseudos unallocated.
    We have to have some available hard registers, to keep gcc setup

                 reply	other threads:[~2022-09-14 10:08 UTC|newest]

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