[gcc r13-2679] rs6000: Using pli(paddi) and rotate to build 64bit constants

[Jiu Fu Guo <guojiufu@gcc.gnu.org>]

https://gcc.gnu.org/g:7a3dfc23a910a47b6c1113b3a28a22858d0b9e7a

commit r13-2679-g7a3dfc23a910a47b6c1113b3a28a22858d0b9e7a
Author: Jiufu Guo <guojiufu@linux.ibm.com>
Date:   Mon Sep 5 13:36:10 2022 +0800

    rs6000: Using pli(paddi) and rotate to build 64bit constants
    
    Hi,
    
    Test cases are updated/added, and code is refined as the comments in the
    review for previous version:
    https://gcc.gnu.org/pipermail/gcc-patches/2022-September/600768.html
    
    As mentioned in PR106550, since pli could support 34bits immediate, we could
    use less instructions(3insn would be ok) to build 64bits constant with pli.
    
    For example, for constant 0x020805006106003, we could generate it with:
    asm code1:
    pli 9,101736451 (0x6106003)
    sldi 9,9,32
    paddi 9,9, 2130000 (0x0208050)
    
    or asm code2:
    pli 10, 2130000
    pli 9, 101736451
    rldimi 9, 10, 32, 0
    
    The asm code2 would be better.
    This patch generates the asm code2 in split1 pass, this patch also supports
    to generate asm code1 when splitter is only after RA.
    
    This patch pass boostrap and regtest on ppc64. P10 testing is running.
    Thanks for any comments!
    
    BR,
    Jeff(Jiufu)
    
            PR target/106550
    
    gcc/ChangeLog:
    
            * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Use pli.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/powerpc/pr106550.c: New test.
            * gcc.target/powerpc/pr106550_1.c: New test.

Diff:
---
 gcc/config/rs6000/rs6000.cc                   | 35 +++++++++++++++++++++++++++
 gcc/testsuite/gcc.target/powerpc/pr106550.c   | 14 +++++++++++
 gcc/testsuite/gcc.target/powerpc/pr106550_1.c | 22 +++++++++++++++++
 3 files changed, 71 insertions(+)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index fcca062a870..5f347e9574f 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -10297,6 +10297,41 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c)
 			gen_rtx_IOR (DImode, copy_rtx (temp),
 				     GEN_INT (ud1)));
     }
+  else if (TARGET_PREFIXED)
+    {
+      if (can_create_pseudo_p ())
+	{
+	  /* pli A,L + pli B,H + rldimi A,B,32,0.  */
+	  temp = gen_reg_rtx (DImode);
+	  rtx temp1 = gen_reg_rtx (DImode);
+	  emit_move_insn (temp, GEN_INT ((ud4 << 16) | ud3));
+	  emit_move_insn (temp1, GEN_INT ((ud2 << 16) | ud1));
+
+	  emit_insn (gen_rotldi3_insert_3 (dest, temp, GEN_INT (32), temp1,
+					   GEN_INT (0xffffffff)));
+	}
+      else
+	{
+	  /* pli A,H + sldi A,32 + paddi A,A,L.  */
+	  emit_move_insn (dest, GEN_INT ((ud4 << 16) | ud3));
+
+	  emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32)));
+
+	  bool can_use_paddi = REGNO (dest) != FIRST_GPR_REGNO;
+
+	  /* Use paddi for the low 32 bits.  */
+	  if (ud2 != 0 && ud1 != 0 && can_use_paddi)
+	    emit_move_insn (dest, gen_rtx_PLUS (DImode, dest,
+						GEN_INT ((ud2 << 16) | ud1)));
+
+	  /* Use oris, ori for low 32 bits.  */
+	  if (ud2 != 0 && (ud1 == 0 || !can_use_paddi))
+	    emit_move_insn (dest,
+			    gen_rtx_IOR (DImode, dest, GEN_INT (ud2 << 16)));
+	  if (ud1 != 0 && (ud2 == 0 || !can_use_paddi))
+	    emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud1)));
+	}
+    }
   else
     {
       temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
diff --git a/gcc/testsuite/gcc.target/powerpc/pr106550.c b/gcc/testsuite/gcc.target/powerpc/pr106550.c
new file mode 100644
index 00000000000..74e395331ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr106550.c
@@ -0,0 +1,14 @@
+/* PR target/106550 */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+/* { dg-require-effective-target power10_ok } */
+
+void
+foo (unsigned long long *a)
+{
+  *a++ = 0x020805006106003; /* pli+pli+rldimi */
+  *a++ = 0x2351847027482577;/* pli+pli+rldimi */  
+}
+
+/* { dg-final { scan-assembler-times {\mpli\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mrldimi\M} 2 } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr106550_1.c b/gcc/testsuite/gcc.target/powerpc/pr106550_1.c
new file mode 100644
index 00000000000..7e709fcf9d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr106550_1.c
@@ -0,0 +1,22 @@
+/* PR target/106550 */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10 -fdisable-rtl-split1" } */
+/* force the constant splitter run after RA: -fdisable-rtl-split1.  */
+
+void
+foo (unsigned long long *a)
+{
+  /* Test oris/ori is used where paddi does not work with 'r0'. */
+  register long long d asm("r0") = 0x1245abcef9240dec; /* pli+sldi+oris+ori */
+  long long n;
+  asm("cntlzd %0, %1" : "=r"(n) : "r"(d));
+  *a++ = n;
+
+  *a++ = 0x235a8470a7480000ULL; /* pli+sldi+oris */
+  *a++ = 0x23a184700000b677ULL; /* pli+sldi+ori */
+}
+
+/* { dg-final { scan-assembler-times {\mpli\M} 3 } } */
+/* { dg-final { scan-assembler-times {\msldi\M} 3 } } */
+/* { dg-final { scan-assembler-times {\moris\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mori\M} 2 } } */