From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1923) id A5155384B12E; Thu, 6 Oct 2022 10:39:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A5155384B12E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1665052759; bh=lEMCLIZ5oPCYOjhzScGiSeolwONrHorA7JqdRL1maW8=; h=From:To:Subject:Date:From; b=AVluOVStFNVEHNdCU8vT7KIj3ZcByTlXjgUVfuO/Ty948g2ykqbl+3YuBYAM/UTCY LMP9D/PjmBlryfrfMFQ0KGrBhdhW77HqdB/kIwV01bPsZQU0oiznLItVXRr3ERWj3H bwIPvjqBjg7y+ldMd6SQ/U79Qi5h4ywMn1IgPvhU= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Philipp Tomsich To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-3128] aarch64: update Ampere-1 core definition X-Act-Checkin: gcc X-Git-Author: Philipp Tomsich X-Git-Refname: refs/heads/master X-Git-Oldrev: b1cfbccc41de6aec950c0f662e7e85ab34bfff8a X-Git-Newrev: db2f5d661239737157cf131de7d4df1c17d8d88d Message-Id: <20221006103919.A5155384B12E@sourceware.org> Date: Thu, 6 Oct 2022 10:39:19 +0000 (GMT) List-Id: https://gcc.gnu.org/g:db2f5d661239737157cf131de7d4df1c17d8d88d commit r13-3128-gdb2f5d661239737157cf131de7d4df1c17d8d88d Author: Philipp Tomsich Date: Mon Aug 8 00:30:52 2022 +0200 aarch64: update Ampere-1 core definition This brings the extensions detected by -mcpu=native on Ampere-1 systems in sync with the defaults generated for -mcpu=ampere1. Note that some early kernel versions on Ampere1 may misreport the presence of PAUTH and PREDRES (i.e., -mcpu=native will add 'nopauth' and 'nopredres'). gcc/ChangeLog: * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update Ampere-1 core entry. Signed-off-by: Philipp Tomsich Diff: --- gcc/config/aarch64/aarch64-cores.def | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index b50628d6b51..e9a4b622be0 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -69,7 +69,7 @@ AARCH64_CORE("thunderxt81", thunderxt81, thunderx, V8A, (CRC, CRYPTO), thu AARCH64_CORE("thunderxt83", thunderxt83, thunderx, V8A, (CRC, CRYPTO), thunderx, 0x43, 0x0a3, -1) /* Ampere Computing ('\xC0') cores. */ -AARCH64_CORE("ampere1", ampere1, cortexa57, V8_6A, (), ampere1, 0xC0, 0xac3, -1) +AARCH64_CORE("ampere1", ampere1, cortexa57, V8_6A, (F16, RNG, AES, SHA3), ampere1, 0xC0, 0xac3, -1) /* Do not swap around "emag" and "xgene1", this order is required to handle variant correctly. */ AARCH64_CORE("emag", emag, xgene1, V8A, (CRC, CRYPTO), emag, 0x50, 0x000, 3)