From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id E104E3857361; Tue, 11 Oct 2022 22:41:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E104E3857361 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1665528064; bh=8Mlj7Or50Vrtle4W7L+wTNxE/dkWehxLS/PvpbAkM+g=; h=From:To:Subject:Date:From; b=bHXvwQNi3xtEIHRgBAk77ZJ/RiMai0x/r+oVNgH8nx2ljRKTdaljv+nXV29Ik01Ql UlOLgk7SpWes+ShTAJXY1c20IpNADy3+dqrU1jZ7Csfq83AbLK3Mumgpvw5vUmuIZl e3bNIsh18dLjqcfx+w420zwkxjY2w0G/do3pXrR0= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/dmf001)] Add accumulator_operand. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/dmf001 X-Git-Oldrev: 6b5cc56f1460f9b83f8548aa681e2348dda30c13 X-Git-Newrev: 9af78e29a3a16ec1ab33cf31c2c5c33ce7e325a7 Message-Id: <20221011224104.E104E3857361@sourceware.org> Date: Tue, 11 Oct 2022 22:41:04 +0000 (GMT) List-Id: https://gcc.gnu.org/g:9af78e29a3a16ec1ab33cf31c2c5c33ce7e325a7 commit 9af78e29a3a16ec1ab33cf31c2c5c33ce7e325a7 Author: Michael Meissner Date: Tue Oct 11 18:40:43 2022 -0400 Add accumulator_operand. 2022-10-11 Michael Meissner gcc/ * config/rs6000/predicates.md (accumulator_operand): New predicate. Diff: --- gcc/config/rs6000/predicates.md | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 51aa0f7449e..5fcda8543b2 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -199,6 +199,24 @@ return DMF_REGNO_P (REGNO (op)); }) +;; Return 1 if op is an accumulator. On power10 systems, the accumulators +;; overlap with the FPRs, while on systems with DMF, the accumulators are +;; separate dense math registers and do not overlap with the FPR registers.. +(define_predicate "accumulator_operand" + (match_operand 0 "register_operand") +{ + if (!REG_P (op)) + return 0; + + if (!HARD_REGISTER_P (op)) + return 1; + + int r = REGNO (op); + return (TARGET_DMF + ? DMF_REGNO_P (r) + : FP_REGNO_P (r) && (r & 3) == 0); +}) + ;; Return 1 if op is the carry register. (define_predicate "ca_operand" (match_operand 0 "register_operand")