From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id B22CD38582BC; Wed, 12 Oct 2022 12:52:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B22CD38582BC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1665579152; bh=t2d13eZMg/2ClZUD0V/VVdBMs4leBBHusBTjxN9cJYQ=; h=From:To:Subject:Date:From; b=DkqHBBfCKa2jg4XYqUgG1SoV3EQCUtzPapdu9Nn1SPlR+PLKqLYhyXfpbppo/cilP Kn2zVA75l4e513NfKDoHqLb8HwEfouaVd5myCHcbkar1dX3aFYnya3NUqsCnTgCTAL S9fVdQv0yK5uUkmj8rITzySamZJNjRtxxyAPsF0M= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-3251] RISC-V: Move function place to make it looks better. [NFC] X-Act-Checkin: gcc X-Git-Author: Ju-Zhe Zhong X-Git-Refname: refs/heads/master X-Git-Oldrev: 11c72f20d4d7ba1862a257cef05dc3a5e84a276d X-Git-Newrev: fcb94f551f29587f04dac0e9b99c98094479835d Message-Id: <20221012125232.B22CD38582BC@sourceware.org> Date: Wed, 12 Oct 2022 12:52:32 +0000 (GMT) List-Id: https://gcc.gnu.org/g:fcb94f551f29587f04dac0e9b99c98094479835d commit r13-3251-gfcb94f551f29587f04dac0e9b99c98094479835d Author: Ju-Zhe Zhong Date: Tue Oct 11 12:48:20 2022 +0800 RISC-V: Move function place to make it looks better. [NFC] gcc/ChangeLog: * config/riscv/riscv-vector-builtins.h (class rvv_switcher): Move to this to .... * config/riscv/riscv-vector-builtins.cc (class rvv_switcher): here. Diff: --- gcc/config/riscv/riscv-vector-builtins.cc | 19 +++++++++++++++++++ gcc/config/riscv/riscv-vector-builtins.h | 19 ------------------- 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc index 7033b1fc176..d523192570b 100644 --- a/gcc/config/riscv/riscv-vector-builtins.cc +++ b/gcc/config/riscv/riscv-vector-builtins.cc @@ -86,6 +86,25 @@ static GTY(()) tree abi_vector_types[NUM_VECTOR_TYPES + 1]; extern GTY(()) tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1]; tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1]; +/* RAII class for enabling enough RVV features to define the built-in + types and implement the riscv_vector.h pragma. + + Note: According to 'TYPE_MODE' macro implementation, we need set + have_regs_of_mode[mode] to be true if we want to get the exact mode + from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in + targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode + before targetm.init_builtins () and recover back have_regs_of_mode + after targetm.init_builtins (). */ +class rvv_switcher +{ +public: + rvv_switcher (); + ~rvv_switcher (); + +private: + bool m_old_have_regs_of_mode[MAX_MACHINE_MODE]; +}; + rvv_switcher::rvv_switcher () { /* Set have_regs_of_mode before targetm.init_builtins (). */ diff --git a/gcc/config/riscv/riscv-vector-builtins.h b/gcc/config/riscv/riscv-vector-builtins.h index ec85e0b1320..5c01a760657 100644 --- a/gcc/config/riscv/riscv-vector-builtins.h +++ b/gcc/config/riscv/riscv-vector-builtins.h @@ -36,25 +36,6 @@ enum vector_type_index NUM_VECTOR_TYPES }; -/* RAII class for enabling enough RVV features to define the built-in - types and implement the riscv_vector.h pragma. - - Note: According to 'TYPE_MODE' macro implementation, we need set - have_regs_of_mode[mode] to be true if we want to get the exact mode - from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in - targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode - before targetm.init_builtins () and recover back have_regs_of_mode - after targetm.init_builtins (). */ -class rvv_switcher -{ -public: - rvv_switcher (); - ~rvv_switcher (); - -private: - bool m_old_have_regs_of_mode[MAX_MACHINE_MODE]; -}; - } // end namespace riscv_vector #endif