From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id BF4F03858D38; Sat, 15 Oct 2022 00:01:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BF4F03858D38 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1665792099; bh=CrbisbMurjmtGw0s12pMAOCQjIi30i4sjv03dnXdfOc=; h=From:To:Subject:Date:From; b=ayo1KylkqiOZbfndpRN8OUuEU/j8ySygbNKYA1mlJkDXQ6LAxQwwvU3HbZ/1G8USt bKlG5BZCdhtjrv3w3jn4+n3JLflzqTRKfc4xP4iDMZz2Lwft/ZEdhimI3cj2YdSOov OMygiQmatTpg6DhoFa4ofeBsqUrk+l8PzJAShC4M= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/dmf001)] Change mma_fpr to not_dmf. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/dmf001 X-Git-Oldrev: 1a5cd271647e77f93253540d3f27142b63f16782 X-Git-Newrev: 3d76ee15bfe1a27364e60ead6205218ec3a307f4 Message-Id: <20221015000139.BF4F03858D38@sourceware.org> Date: Sat, 15 Oct 2022 00:01:39 +0000 (GMT) List-Id: https://gcc.gnu.org/g:3d76ee15bfe1a27364e60ead6205218ec3a307f4 commit 3d76ee15bfe1a27364e60ead6205218ec3a307f4 Author: Michael Meissner Date: Fri Oct 14 20:00:16 2022 -0400 Change mma_fpr to not_dmf. 2022-10-14 Michael Meissner gcc/ * config/rs6000/mma.md (mma_): Use isa attribute 'not_dmf' instead of 'mma_fpr'. (mma_): Likewise. (mma_): Likewise. (mma_): Likewise. (mma_): Likewise. (mma_): Likewise. (mma_): Likewise. (mma_): Likewise. (mma_): Likewise. (mma_): Likewise. (mma_): Likewise. (mma_): Likewise. (mma_"): Likewise. (mma_): Likewise. * config/rs6000/rs6000.md (isa attribute): Rename mma_fpr to not_dmf. (enabled attribute): Likewise. Diff: --- gcc/config/rs6000/mma.md | 29 +++++++++++++++-------------- gcc/config/rs6000/rs6000.md | 8 +++----- 2 files changed, 18 insertions(+), 19 deletions(-) diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md index c0ac6addac9..812ecc2671f 100644 --- a/gcc/config/rs6000/mma.md +++ b/gcc/config/rs6000/mma.md @@ -614,7 +614,7 @@ "TARGET_MMA" " %A0,%x1,%x2" [(set_attr "type" "mma") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -625,7 +625,7 @@ "TARGET_MMA" " %A0,%x2,%x3" [(set_attr "type" "mma") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -635,7 +635,7 @@ "TARGET_MMA" " %A0,%x1,%x2" [(set_attr "type" "mma") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -646,7 +646,7 @@ "TARGET_MMA" " %A0,%x2,%x3" [(set_attr "type" "mma") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -659,7 +659,8 @@ "TARGET_MMA" " %A0,%x1,%x2,%3,%4,%5" [(set_attr "type" "mma") - (set_attr "prefixed" "yes")]) + (set_attr "prefixed" "yes") + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -674,7 +675,7 @@ " %A0,%x2,%x3,%4,%5,%6" [(set_attr "type" "mma") (set_attr "prefixed" "yes") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -688,7 +689,7 @@ " %A0,%x1,%x2,%3,%4,%5" [(set_attr "type" "mma") (set_attr "prefixed" "yes") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -703,7 +704,7 @@ " %A0,%x2,%x3,%4,%5,%6" [(set_attr "type" "mma") (set_attr "prefixed" "yes") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -716,7 +717,7 @@ " %A0,%x1,%x2,%3,%4" [(set_attr "type" "mma") (set_attr "prefixed" "yes") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -730,7 +731,7 @@ " %A0,%x2,%x3,%4,%5" [(set_attr "type" "mma") (set_attr "prefixed" "yes") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -743,7 +744,7 @@ " %A0,%x1,%x2,%3,%4" [(set_attr "type" "mma") (set_attr "prefixed" "yes") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -757,7 +758,7 @@ " %A0,%x2,%x3,%4,%5" [(set_attr "type" "mma") (set_attr "prefixed" "yes") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -771,7 +772,7 @@ " %A0,%x1,%x2,%3,%4,%5" [(set_attr "type" "mma") (set_attr "prefixed" "yes") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) (define_insn "mma_" [(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d") @@ -786,4 +787,4 @@ " %A0,%x2,%x3,%4,%5,%6" [(set_attr "type" "mma") (set_attr "prefixed" "yes") - (set_attr "isa" "dmf,mma_fpr,mma_fpr")]) + (set_attr "isa" "dmf,not_dmf,not_dmf")]) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 287ddd16ecd..fdf8ab9e2df 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -356,7 +356,7 @@ (const (symbol_ref "(enum attr_cpu) rs6000_tune"))) ;; The ISA we implement. -(define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9,p9v,p9kf,p9tf,p10,dmf,mma_fpr" +(define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9,p9v,p9kf,p9tf,p10,dmf,not_dmf" (const_string "any")) ;; Is this alternative enabled for the current CPU/ISA/etc.? @@ -409,10 +409,8 @@ (match_test "TARGET_DMF")) (const_int 1) - ;; mma_fpr is for use on power10 systems where the accumulators overlap - ;; with the FPR registers. - (and (eq_attr "isa" "mma_fpr") - (match_test "TARGET_MMA && !TARGET_DMF")) + (and (eq_attr "isa" "not_dmf") + (match_test "!TARGET_DMF")) (const_int 1) ] (const_int 0)))