From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1579) id 77D423858291; Mon, 17 Oct 2022 20:10:47 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 77D423858291 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1666037447; bh=/aCDvqWxu/Vvv/Nrpg6J2ZZdJSoKoXMk9nbV0dfMXpg=; h=From:To:Subject:Date:From; b=U9XQAV0mVOmJZ/LwWRuo6SD7Y6qNwr7xJNt38dFosveD2XxjNzWPuxWEJsyyj0B4q B6VbWVCQL7ic2bFwHeMq+xZd3PynXSs0BZelA7qn17yw8FwmDYgeRQiaMOSecIZ4BZ z2iSyz45S7EFGdukAY9VZx2dXsIELeL2uBJ3ooNA= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Pat Haugen To: gcc-cvs@gcc.gnu.org Subject: [gcc r10-11043] Fix register count when not splitting Complex IEEE 128-bit args. X-Act-Checkin: gcc X-Git-Author: Pat Haugen X-Git-Refname: refs/heads/releases/gcc-10 X-Git-Oldrev: 6e9812a08a22ec3b03490c4ba827ec4eb0d7123d X-Git-Newrev: 7af52b39059b4496b17337d0efc7575f17febb26 Message-Id: <20221017201047.77D423858291@sourceware.org> Date: Mon, 17 Oct 2022 20:10:47 +0000 (GMT) List-Id: https://gcc.gnu.org/g:7af52b39059b4496b17337d0efc7575f17febb26 commit r10-11043-g7af52b39059b4496b17337d0efc7575f17febb26 Author: Pat Haugen Date: Mon Oct 17 14:53:11 2022 -0500 Fix register count when not splitting Complex IEEE 128-bit args. For ABI_V4, we do not split complex args. This created a problem because even though an arg would be passed in two VSX regs, we were only advancing the function arg counter by one VSX register. Fixed with this patch. (backported commit 2ee68beee709e48fce85b8892ff9985acc6a91a8) gcc/ PR target/99685 * config/rs6000/rs6000-call.c (rs6000_function_arg_advance_1): Bump register count when not splitting IEEE 128-bit Complex. Diff: --- gcc/config/rs6000/rs6000-call.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index c910ee5c71a..4e55cbaab55 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -6534,6 +6534,12 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, machine_mode mode, { cum->vregno += n_elts; + /* If we are not splitting Complex IEEE128 args then account for the + fact that they are passed in 2 VSX regs. */ + if (!targetm.calls.split_complex_arg && type + && TREE_CODE (type) == COMPLEX_TYPE && elt_mode == KCmode) + cum->vregno++; + if (!TARGET_ALTIVEC) error ("cannot pass argument in vector register because" " altivec instructions are disabled, use %qs"