From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id 2A713385694D; Fri, 21 Oct 2022 07:32:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2A713385694D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1666337569; bh=gM8RAhOHpXQjJOMZSGVNWAxeYcE/8+NWhv2RIMSXfTE=; h=From:To:Subject:Date:From; b=RlY9Tu45Ycw9n8GRwLRe+4gGf4V9v2rNlFiJCd8AG0q9BIlxZ1aJlO4/ev8+9busV DyYb+zFE9WwrLU5MOI/1eyp9pt8EZFZELB+2UeD0ooDJP8jg1UGHWKPeJLzJ3owiFf mY2eV8xJfM9ydX4S44yhIR+VNu/1q/VKv8rNqsTY= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-3431] RISC-V: Add type attribute for atomic instructions. X-Act-Checkin: gcc X-Git-Author: Monk Chiang X-Git-Refname: refs/heads/master X-Git-Oldrev: fa553ff26d96f6fecaa8f1b00649cfdc6cda5f5a X-Git-Newrev: bdac4b47cbdac52c7082c02f54ed07197161cb4d Message-Id: <20221021073249.2A713385694D@sourceware.org> Date: Fri, 21 Oct 2022 07:32:49 +0000 (GMT) List-Id: https://gcc.gnu.org/g:bdac4b47cbdac52c7082c02f54ed07197161cb4d commit r13-3431-gbdac4b47cbdac52c7082c02f54ed07197161cb4d Author: Monk Chiang Date: Fri Oct 21 13:01:59 2022 +0800 RISC-V: Add type attribute for atomic instructions. gcc/ChangeLog: * config/riscv/riscv.md: Add atomic type attribute. * config/riscv/sync.md: Add atomic type for atomic instructions. Diff: --- gcc/config/riscv/riscv.md | 2 +- gcc/config/riscv/sync.md | 15 ++++++++++----- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index b3654915fde..9384ced0447 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -317,7 +317,7 @@ "unknown,branch,jump,call,load,fpload,store,fpstore, mtc,mfc,const,arith,logical,shift,slt,imul,idiv,move,fmove,fadd,fmul, fmadd,fdiv,fcmp,fcvt,fsqrt,multi,auipc,sfb_alu,nop,ghost,bitmanip,rotate, - rdvlenb,rdvl,vsetvl,vlde,vste,vldm,vstm,vlds,vsts, + atomic,rdvlenb,rdvl,vsetvl,vlde,vste,vldm,vstm,vlds,vsts, vldux,vldox,vstux,vstox,vldff,vldr,vstr, vialu,viwalu,vext,vicalu,vshift,vnshift,vicmp, vimul,vidiv,viwmul,vimuladd,viwmuladd,vimerge,vimov, diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 7deb290d9dc..449f275e6a2 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -62,7 +62,8 @@ UNSPEC_ATOMIC_STORE))] "TARGET_ATOMIC" "%F2amoswap.%A2 zero,%z1,%0" - [(set (attr "length") (const_int 8))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 8))]) (define_insn "atomic_" [(set (match_operand:GPR 0 "memory_operand" "+A") @@ -73,7 +74,8 @@ UNSPEC_SYNC_OLD_OP))] "TARGET_ATOMIC" "%F2amo.%A2 zero,%z1,%0" - [(set (attr "length") (const_int 8))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 8))]) (define_insn "atomic_fetch_" [(set (match_operand:GPR 0 "register_operand" "=&r") @@ -86,7 +88,8 @@ UNSPEC_SYNC_OLD_OP))] "TARGET_ATOMIC" "%F3amo.%A3 %0,%z2,%1" - [(set (attr "length") (const_int 8))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 8))]) (define_insn "atomic_exchange" [(set (match_operand:GPR 0 "register_operand" "=&r") @@ -98,7 +101,8 @@ (match_operand:GPR 2 "register_operand" "0"))] "TARGET_ATOMIC" "%F3amoswap.%A3 %0,%z2,%1" - [(set (attr "length") (const_int 8))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 8))]) (define_insn "atomic_cas_value_strong" [(set (match_operand:GPR 0 "register_operand" "=&r") @@ -112,7 +116,8 @@ (clobber (match_scratch:GPR 6 "=&r"))] "TARGET_ATOMIC" "%F5 1: lr.%A5 %0,%1; bne %0,%z2,1f; sc.%A4 %6,%z3,%1; bnez %6,1b; 1:" - [(set (attr "length") (const_int 20))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 20))]) (define_expand "atomic_compare_and_swap" [(match_operand:SI 0 "register_operand" "") ;; bool output