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From: Kito Cheng <kito@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r13-3451] RISC-V: Support (set (mem) (const_poly_int))
Date: Mon, 24 Oct 2022 02:49:33 +0000 (GMT)	[thread overview]
Message-ID: <20221024024933.0EE49385840A@sourceware.org> (raw)

https://gcc.gnu.org/g:6bfea64164c3f1989d34656ab96d03a7cda2143e

commit r13-3451-g6bfea64164c3f1989d34656ab96d03a7cda2143e
Author: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Date:   Mon Oct 24 10:03:12 2022 +0800

    RISC-V: Support (set (mem) (const_poly_int))
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.cc (riscv_legitimize_move): Support (set (mem) (const_poly_int)).

Diff:
---
 gcc/config/riscv/riscv.cc | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 90a39047dd7..53a91a1003b 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -1958,6 +1958,18 @@ riscv_legitimize_move (machine_mode mode, rtx dest, rtx src)
 {
   if (CONST_POLY_INT_P (src))
     {
+      /*
+	Handle:
+	  (insn 183 182 184 6 (set (mem:QI (plus:DI (reg/f:DI 156)
+		  (const_int 96 [0x60])) [0  S1 A8])
+	  (const_poly_int:QI [8, 8]))
+	"../../../../riscv-gcc/libgcc/unwind-dw2.c":1579:3 -1 (nil))
+      */
+      if (MEM_P (dest))
+	{
+	  emit_move_insn (dest, force_reg (mode, src));
+	  return true;
+	}
       poly_int64 value = rtx_to_poly_int64 (src);
       if (!value.is_constant () && !TARGET_VECTOR)
 	{

                 reply	other threads:[~2022-10-24  2:49 UTC|newest]

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