From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id AD766388551A; Thu, 27 Oct 2022 04:45:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AD766388551A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1666845900; bh=c2tVQJbRgOYHcaiDN9LCWN2FdxAcejAIFRQCyUP2MP0=; h=From:To:Subject:Date:From; b=U3WUufje+Z2Vsb9s8O+a540GQ/dG8mQAW9ED91icx0KzfDe78ckwNxqS/bkoKC8kY QlbLZojEeI1ZM10sd3gas2H+KtauPF+U6XYaWRR7KReHrl98xYDVePDKqUrYQMjo1c UZdiAHg/NK0j3DPtJxJ0913moCA66CVw+RfmvtR4= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/dmf002)] Update ChangeLog.meissner. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/dmf002 X-Git-Oldrev: 6494412dcb26abb5c611b3a5b6cafef5882fa3cc X-Git-Newrev: 8d5d9c8de2e7438a8b90a8f5c40c791121f4c22b Message-Id: <20221027044500.AD766388551A@sourceware.org> Date: Thu, 27 Oct 2022 04:45:00 +0000 (GMT) List-Id: https://gcc.gnu.org/g:8d5d9c8de2e7438a8b90a8f5c40c791121f4c22b commit 8d5d9c8de2e7438a8b90a8f5c40c791121f4c22b Author: Michael Meissner Date: Thu Oct 27 00:44:42 2022 -0400 Update ChangeLog.meissner. 2022-10-26 Michael Meissner gcc/ * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index c515dc53d7e..92cbc846671 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,54 @@ +==================== Dmf002, patch004. + +Add support for 1,024 bit DMR registers. + +2022-10-26 Michael Meissner + +gcc/ + + * config/rs6000/mma.md (UNSPEC_DM_INSERT512_UPPER): New unspec. + (UNSPEC_DM_INSERT512_LOWER): Likewise. + (UNSPEC_DM_EXTRACT512): Likewise. + (UNSPEC_DMR_RELOAD_FROM_MEMORY): Likewise. + (UNSPEC_DMR_RELOAD_TO_MEMORY): Likewise. + (movtdo): New define_expand and define_insn_and_split to implement 1,024 + bit DMR registers. + (movtdo_insert512_upper): New insn. + (movtdo_insert512_lower): Likewise. + (movtdo_extract512): Likewise. + (reload_dmr_from_memory): Likewise. + (reload_dmr_to_memory): Likewise. + * config/rs6000/rs6000-builtin.cc (rs6000_type_string): Add DMR + support. + (rs6000_init_builtins): Add support for __dmr keyword. + * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define + __DENSE_MATH__ if we have dense math support. + * config/rs6000/rs6000-call.cc (rs6000_return_in_memory): Add support + for TDOmode. + (rs6000_function_arg): Likewise. + * config/rs6000/rs6000-modes.def (TDOmode): New mode. + * config/rs6000/rs6000.cc (rs6000_hard_regno_nregs_internal): Add + support for TDOmode. + (rs6000_hard_regno_mode_ok_uncached): Likewise. + (rs6000_hard_regno_mode_ok): Likewise. + (rs6000_modes_tieable_p): Likewise. + (rs6000_debug_reg_global): Likewise. + (rs6000_setup_reg_addr_masks): Likewise. + (rs6000_init_hard_regno_mode_ok): Add support for TDOmode. Setup reload + hooks for DMR mode. + (reg_offset_addressing_ok_p): Add support for TDOmode. + (rs6000_emit_move): Likewise. + (rs6000_secondary_reload_simple_move): Likewise. + (rs6000_secondary_reload_class): Likewise. + (rs6000_mangle_type): Add mangling for __dmr type. + (rs6000_dmr_register_move_cost): Add support for TDOmode. + (rs6000_split_multireg_move): Likewise. + (rs6000_invalid_conversion): Likewise. + * config/rs6000/rs6000.h (VECTOR_ALIGNMENT_P): Add TDOmode. + (enum rs6000_builtin_type_index): Add DMR type nodes. + (dmr_type_node): Likewise. + (ptr_dmr_type_node): Likewise. + ==================== Dmf002, patch003. Switch to dense math names for all MMA operations.