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From: Andrew Stubbs <ams@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r13-3575] amdgcn: add fmin/fmax patterns
X-Act-Checkin: gcc
X-Git-Author: Andrew Stubbs <ams@codesourcery.com>
X-Git-Refname: refs/heads/master
X-Git-Oldrev: f539029c1ce6fb9163422d1a8b6ac12a2554eaa2
X-Git-Newrev: 10aa0356118f44e5f4d720a2a4c731b173baa298
Message-Id: <20221031130259.5FFD23854179@sourceware.org>
Date: Mon, 31 Oct 2022 13:02:58 +0000 (GMT)
List-Id: <gcc-cvs.sourceware.org>

https://gcc.gnu.org/g:10aa0356118f44e5f4d720a2a4c731b173baa298

commit r13-3575-g10aa0356118f44e5f4d720a2a4c731b173baa298
Author: Andrew Stubbs <ams@codesourcery.com>
Date:   Fri Oct 28 13:09:20 2022 +0100

    amdgcn: add fmin/fmax patterns
    
    Add fmin/fmax for scalar, vector, and reductions.  The smin/smax patterns are
    already using the IEEE compliant hardware instructions anyway, so we can just
    expand to use those insns.
    
    gcc/ChangeLog:
    
            * config/gcn/gcn-valu.md (fminmaxop): New iterator.
            (<fexpander><mode>3): New define_expand.
            (<fexpander><mode>3<exec>): Likewise.
            (reduc_<fexpander>_scal_<mode>): Likewise.
            * config/gcn/gcn.md (fexpander): New attribute.

Diff:
---
 gcc/config/gcn/gcn-valu.md | 28 ++++++++++++++++++++++++++++
 gcc/config/gcn/gcn.md      |  4 ++++
 2 files changed, 32 insertions(+)

diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 6274d2e9228..3b619512e13 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -2466,6 +2466,23 @@
   [(set_attr "type" "vop2")
    (set_attr "length" "8,8")])
 
+(define_code_iterator fminmaxop [smin smax])
+(define_expand "<fexpander><mode>3"
+  [(set (match_operand:FP 0 "gcn_valu_dst_operand")
+	(fminmaxop:FP
+	  (match_operand:FP 1 "gcn_valu_src0_operand")
+	  (match_operand:FP 2 "gcn_valu_src1_operand")))]
+  ""
+  {})
+
+(define_expand "<fexpander><mode>3<exec>"
+  [(set (match_operand:V_FP 0 "gcn_valu_dst_operand")
+	(fminmaxop:V_FP
+	  (match_operand:V_FP 1 "gcn_valu_src0_operand")
+	  (match_operand:V_FP 2 "gcn_valu_src1_operand")))]
+  ""
+  {})
+
 ;; }}}
 ;; {{{ FP unops
 
@@ -3522,6 +3539,17 @@
     DONE;
   })
 
+(define_expand "reduc_<fexpander>_scal_<mode>"
+  [(match_operand:<SCALAR_MODE> 0 "register_operand")
+   (fminmaxop:V_FP
+     (match_operand:V_FP 1 "register_operand"))]
+  ""
+  {
+    /* fmin/fmax are identical to smin/smax.  */
+    emit_insn (gen_reduc_<expander>_scal_<mode> (operands[0], operands[1]));
+    DONE;
+  })
+
 ;; Warning: This "-ffast-math" implementation converts in-order reductions
 ;;          into associative reductions. It's also used where OpenMP or
 ;;          OpenACC paralellization has already broken the in-order semantics.
diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md
index 6c1a438f9d1..987b76396cc 100644
--- a/gcc/config/gcn/gcn.md
+++ b/gcc/config/gcn/gcn.md
@@ -372,6 +372,10 @@
    (sign_extend "extend")
    (zero_extend "zero_extend")])
 
+(define_code_attr fexpander
+  [(smin "fmin")
+   (smax "fmax")])
+
 ;; }}}
 ;; {{{ Miscellaneous instructions