From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1461) id D99023858011; Tue, 1 Nov 2022 11:54:05 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D99023858011 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667303645; bh=Avn0pcbv0/NwIgl/GB6TJi+cDP8PszMCYFPZW4MFe7Q=; h=From:To:Subject:Date:From; b=A3cTk+35J3CZpEvqemCMfVWXp06UXV629d4a0+NkVUWdYs5V3VOqCQnkDaG8Rv4lY APr5xP3iM4ulnXIjnnSnLb0382s0CBUXvXkU2RCsyQIY5KURjfjS4VCl3GZ4yrzVTC 5Psy9UreUwPJesGj2Wux6h9wfY/RM8QDzkk7+qyA= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Andrew Stubbs To: gcc-cvs@gcc.gnu.org Subject: [gcc/devel/omp/gcc-12] amdgcn: add fmin/fmax patterns X-Act-Checkin: gcc X-Git-Author: Andrew Stubbs X-Git-Refname: refs/heads/devel/omp/gcc-12 X-Git-Oldrev: 7ac1717e1b286f7f6348d9af711dfa1a723a6252 X-Git-Newrev: d8f1377233fcacd2034e6c59a8745c54c7656d32 Message-Id: <20221101115405.D99023858011@sourceware.org> Date: Tue, 1 Nov 2022 11:54:05 +0000 (GMT) List-Id: https://gcc.gnu.org/g:d8f1377233fcacd2034e6c59a8745c54c7656d32 commit d8f1377233fcacd2034e6c59a8745c54c7656d32 Author: Andrew Stubbs Date: Fri Oct 28 13:09:20 2022 +0100 amdgcn: add fmin/fmax patterns Add fmin/fmax for scalar, vector, and reductions. The smin/smax patterns are already using the IEEE compliant hardware instructions anyway, so we can just expand to use those insns. gcc/ChangeLog: * config/gcn/gcn-valu.md (fminmaxop): New iterator. (3): New define_expand. (3): Likewise. (reduc__scal_): Likewise. * config/gcn/gcn.md (fexpander): New attribute. (cherry picked from commit 10aa0356118f44e5f4d720a2a4c731b173baa298) Diff: --- gcc/ChangeLog.omp | 11 +++++++++++ gcc/config/gcn/gcn-valu.md | 28 ++++++++++++++++++++++++++++ gcc/config/gcn/gcn.md | 4 ++++ 3 files changed, 43 insertions(+) diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp index 6c7cf8a4dae..f8d5af30ca5 100644 --- a/gcc/ChangeLog.omp +++ b/gcc/ChangeLog.omp @@ -1,3 +1,14 @@ +2022-11-01 Andrew Stubbs + + Backport from mainline: + 2022-10-31 Andrew Stubbs + + * config/gcn/gcn-valu.md (fminmaxop): New iterator. + (3): New define_expand. + (3): Likewise. + (reduc__scal_): Likewise. + * config/gcn/gcn.md (fexpander): New attribute. + 2022-11-01 Andrew Stubbs Backport from mainline: diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 8b113ca7f91..d224f87cfb1 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -2469,6 +2469,23 @@ [(set_attr "type" "vop2") (set_attr "length" "8,8")]) +(define_code_iterator fminmaxop [smin smax]) +(define_expand "3" + [(set (match_operand:FP 0 "gcn_valu_dst_operand") + (fminmaxop:FP + (match_operand:FP 1 "gcn_valu_src0_operand") + (match_operand:FP 2 "gcn_valu_src1_operand")))] + "" + {}) + +(define_expand "3" + [(set (match_operand:V_FP 0 "gcn_valu_dst_operand") + (fminmaxop:V_FP + (match_operand:V_FP 1 "gcn_valu_src0_operand") + (match_operand:V_FP 2 "gcn_valu_src1_operand")))] + "" + {}) + ;; }}} ;; {{{ FP unops @@ -3533,6 +3550,17 @@ DONE; }) +(define_expand "reduc__scal_" + [(match_operand: 0 "register_operand") + (fminmaxop:V_FP + (match_operand:V_FP 1 "register_operand"))] + "" + { + /* fmin/fmax are identical to smin/smax. */ + emit_insn (gen_reduc__scal_ (operands[0], operands[1])); + DONE; + }) + ;; Warning: This "-ffast-math" implementation converts in-order reductions ;; into associative reductions. It's also used where OpenMP or ;; OpenACC paralellization has already broken the in-order semantics. diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md index 1ac0ad0d818..da617cb19ad 100644 --- a/gcc/config/gcn/gcn.md +++ b/gcc/config/gcn/gcn.md @@ -379,6 +379,10 @@ (sign_extend "extend") (zero_extend "zero_extend")]) +(define_code_attr fexpander + [(smin "fmin") + (smax "fmax")]) + ;; }}} ;; {{{ Miscellaneous instructions