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From: Jakub Jelinek <jakub@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r11-10358] i386: Fix up mode iterators that weren't expanded
 [PR106721]
X-Act-Checkin: gcc
X-Git-Author: Jakub Jelinek <jakub@redhat.com>
X-Git-Refname: refs/heads/releases/gcc-11
X-Git-Oldrev: 51e73267de8e204007e68c9ce3d7347eeaef2675
X-Git-Newrev: edf40e86344c407cadca769a6496905a0ec31e48
Message-Id: <20221104083054.4FA2B3858426@sourceware.org>
Date: Fri,  4 Nov 2022 08:30:54 +0000 (GMT)
List-Id: <gcc-cvs.sourceware.org>

https://gcc.gnu.org/g:edf40e86344c407cadca769a6496905a0ec31e48

commit r11-10358-gedf40e86344c407cadca769a6496905a0ec31e48
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Wed Aug 24 09:57:09 2022 +0200

    i386: Fix up mode iterators that weren't expanded [PR106721]
    
    Currently, when md file reader sees <something> and something is valid mode
    (or code) attribute but which doesn't include case for the current mode
    (or code), it just keeps the <something> untouched.
    I went through all cases matching <[a-zA-Z] in tmp-mddump.md after make mddump.
    One of the cases was related to the V*HF mode additions and there was one typo.
    
    2022-08-24  Jakub Jelinek  <jakub@redhat.com>
    
            PR target/106721
            * config/i386/sse.md
            (avx512er_vmrcp28<mode><mask_name><round_saeonly_name>): Fix typo,
            mask_opernad3 -> mask_operand3.
    
    (cherry picked from commit 846e5c009e360f0c4fe58ff0d3aee03ebe3ca1a9)

Diff:
---
 gcc/config/i386/sse.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 2334d0e7c63..95619944c87 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -19495,7 +19495,7 @@
 	  (match_operand:VF_128 2 "register_operand" "v")
 	  (const_int 1)))]
   "TARGET_AVX512ER"
-  "vrcp28<ssescalarmodesuffix>\t{<round_saeonly_mask_op3>%1, %2, %0<mask_operand3>|<mask_opernad3>%0, %2, %<iptr>1<round_saeonly_mask_op3>}"
+  "vrcp28<ssescalarmodesuffix>\t{<round_saeonly_mask_op3>%1, %2, %0<mask_operand3>|<mask_operand3>%0, %2, %<iptr>1<round_saeonly_mask_op3>}"
   [(set_attr "length_immediate" "1")
    (set_attr "prefix" "evex")
    (set_attr "type" "sse")