From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1285) id 7FCDE3858413; Fri, 4 Nov 2022 14:15:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7FCDE3858413 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667571334; bh=L40aoHEnlyFcixrTK+C2X+WqMwI9mGQeFzv2ksL+vFs=; h=From:To:Subject:Date:From; b=JX0i9Yr/tFLU2IIcmsIHlYISN8s1WefLIiPNiPAU+wyVo0DMG4xH1xI0OrH1s4YRk L8GJ3+8IBpodgfGxfis4cGCdYHwSY9gnCNSoeHKPTuhmWx7RoNE665lu4P8qJSsj5G LQxMtcBbvX1b8oF/sSdGkH1r141WKsanr10uKADM= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Eric Botcazou To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-3686] Do not use subword paradoxical subregs in emit_group_store X-Act-Checkin: gcc X-Git-Author: Eric Botcazou X-Git-Refname: refs/heads/master X-Git-Oldrev: 418999fe382c608facf57f96b53a9cb12d2fdd20 X-Git-Newrev: 3e2bdf2460a34a2389dee813a2ba8ecf976f2ec9 Message-Id: <20221104141534.7FCDE3858413@sourceware.org> Date: Fri, 4 Nov 2022 14:15:34 +0000 (GMT) List-Id: https://gcc.gnu.org/g:3e2bdf2460a34a2389dee813a2ba8ecf976f2ec9 commit r13-3686-g3e2bdf2460a34a2389dee813a2ba8ecf976f2ec9 Author: Eric Botcazou Date: Fri Nov 4 11:15:57 2022 +0100 Do not use subword paradoxical subregs in emit_group_store The goal of the trick is to make life easier for the combiner, but subword paradoxical subregs make it harder for the register allocator instead. gcc/ * expr.cc (emit_group_store): Do not use subword paradoxical subregs Diff: --- gcc/expr.cc | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/gcc/expr.cc b/gcc/expr.cc index 9145193c2c1..c6917fbf7bd 100644 --- a/gcc/expr.cc +++ b/gcc/expr.cc @@ -2901,19 +2901,19 @@ emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER) dst = gen_reg_rtx (outer); - /* Make life a bit easier for combine. */ - /* If the first element of the vector is the low part - of the destination mode, use a paradoxical subreg to - initialize the destination. */ + /* Make life a bit easier for combine: if the first element of the + vector is the word (or larger) low part of the destination mode, + use a paradoxical subreg to initialize the destination. */ if (start < finish) { inner = GET_MODE (tmps[start]); bytepos = subreg_lowpart_offset (inner, outer); - if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, start), 1)), - bytepos)) + if (known_ge (GET_MODE_BITSIZE (inner), BITS_PER_WORD) + && known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, + start), 1)), + bytepos)) { - temp = simplify_gen_subreg (outer, tmps[start], - inner, 0); + temp = simplify_gen_subreg (outer, tmps[start], inner, 0); if (temp) { emit_move_insn (dst, temp); @@ -2929,12 +2929,12 @@ emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, { inner = GET_MODE (tmps[finish - 1]); bytepos = subreg_lowpart_offset (inner, outer); - if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, - finish - 1), 1)), - bytepos)) + if (known_ge (GET_MODE_BITSIZE (inner), BITS_PER_WORD) + && known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, + finish - 1), 1)), + bytepos)) { - temp = simplify_gen_subreg (outer, tmps[finish - 1], - inner, 0); + temp = simplify_gen_subreg (outer, tmps[finish - 1], inner, 0); if (temp) { emit_move_insn (dst, temp);