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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/dmf003)] Update ChangeLog.meissner.
Date: Sat,  5 Nov 2022 03:27:40 +0000 (GMT)	[thread overview]
Message-ID: <20221105032740.E8FCB385841A@sourceware.org> (raw)

https://gcc.gnu.org/g:330e5128654bd176c5be3999b6197edfec31a357

commit 330e5128654bd176c5be3999b6197edfec31a357
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Nov 4 23:26:39 2022 -0400

    Update ChangeLog.meissner.
    
    2022-11-04   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index bb8c5c1749e..668e877c883 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -32,6 +32,12 @@ gcc/
 	(mma_<vvi4i4i4>): Likewise.
 	(mma_<avvi4i4i4>): Likewise.
 
+gcc/testsuite/
+
+	* gcc.target/powerpc/dm-double-test.c: New test.
+	* lib/target-supports.exp (check_effective_target_ppc_dmr_ok): New
+	target test.
+
 ==================== Dmf003 branch, patch #13.
 
 Make MMA insns support dmr registers.
@@ -67,12 +73,6 @@ gcc/
 	(rs6000_split_multireg_move): Do not generate accumulator prime or
 	de-prime instructions if dense math.
 
-gcc/testsuite/
-
-	* gcc.target/powerpc/dm-double-test.c: New test.
-	* lib/target-supports.exp (check_effective_target_ppc_dmr_ok): New
-	target test.
-
 ==================== Dmf003 branch, patch #12.
 
 Add support for accumulators in DMR registers.

             reply	other threads:[~2022-11-05  3:27 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-05  3:27 Michael Meissner [this message]
  -- strict thread matches above, loose matches on Subject: below --
2022-11-09  5:34 Michael Meissner
2022-11-09  5:02 Michael Meissner
2022-11-08 16:04 Michael Meissner
2022-11-05  4:23 Michael Meissner
2022-11-05  3:01 Michael Meissner
2022-11-04 23:24 Michael Meissner
2022-11-04 22:56 Michael Meissner
2022-11-04 21:13 Michael Meissner
2022-11-04 17:09 Michael Meissner
2022-11-04  7:14 Michael Meissner
2022-11-04  6:38 Michael Meissner

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