From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1729) id DC5B43858C2F; Mon, 7 Nov 2022 15:15:07 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DC5B43858C2F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667834107; bh=UFWudChFAjHi/FaGXRw5LE1PgXGo36nJdPZnotvwXqU=; h=From:To:Subject:Date:From; b=SiV1PyOUq3bkbm3GpWrZ87bqf+WwTbk2jCZ9OE6qtlr5w2kqDvGn3BllCzbB4vjjQ M1PUPiwEZ10IDd9bKQatrpgByne436bASSvuiAPQXHZOiC7gsqLwI1O+HauBEvO0ub EuJvDIEaeUGqsPF7gRVSIdXIjoslja94MYs8wO90= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Kwok Yeung To: gcc-cvs@gcc.gnu.org Subject: [gcc/devel/omp/gcc-12] amdgcn: Fixed intermittent failure in vectorized version of rint X-Act-Checkin: gcc X-Git-Author: Kwok Cheung Yeung X-Git-Refname: refs/heads/devel/omp/gcc-12 X-Git-Oldrev: f9d5362918ef7aa6f840ac48ccb8897a09fe99f1 X-Git-Newrev: 8e6c5b18e10adb63811ee5e3423e20146077c439 Message-Id: <20221107151507.DC5B43858C2F@sourceware.org> Date: Mon, 7 Nov 2022 15:15:07 +0000 (GMT) List-Id: https://gcc.gnu.org/g:8e6c5b18e10adb63811ee5e3423e20146077c439 commit 8e6c5b18e10adb63811ee5e3423e20146077c439 Author: Kwok Cheung Yeung Date: Mon Nov 7 12:17:08 2022 +0000 amdgcn: Fixed intermittent failure in vectorized version of rint The lane mask was not being updated properly in nested conditionals. Also fixed an issue causing inaccuracy in double-precision rint. 2022-11-07 Kwok Cheung Yeung libgcc/ * config/gcn/simd-math/v64df_rint.c (rint): Simplified. Fixed bug in nested VECTOR_IF. Fixed issue with signed right-shift. * config/gcn/simd-math/v64sf_rint.c (rintf): Simplified. Fixed bug in nested VECTOR_IF. Diff: --- libgcc/ChangeLog.omp | 7 +++++++ libgcc/config/gcn/simd-math/v64df_rint.c | 4 ++-- libgcc/config/gcn/simd-math/v64sf_rint.c | 22 +++++++--------------- 3 files changed, 16 insertions(+), 17 deletions(-) diff --git a/libgcc/ChangeLog.omp b/libgcc/ChangeLog.omp index 37ab8fcbf69..af9abdb220e 100644 --- a/libgcc/ChangeLog.omp +++ b/libgcc/ChangeLog.omp @@ -1,3 +1,10 @@ +2022-11-07 Kwok Cheung Yeung + + * config/gcn/simd-math/v64df_rint.c (rint): Simplified. Fixed bug in + nested VECTOR_IF. Fixed issue with signed right-shift. + * config/gcn/simd-math/v64sf_rint.c (rintf): Simplified. Fixed bug in + nested VECTOR_IF. + 2022-11-01 Kwok Cheung Yeung Paul-Antoine Arras Andrew Jenner diff --git a/libgcc/config/gcn/simd-math/v64df_rint.c b/libgcc/config/gcn/simd-math/v64df_rint.c index ec36cce8c86..561c9a2ac9d 100644 --- a/libgcc/config/gcn/simd-math/v64df_rint.c +++ b/libgcc/config/gcn/simd-math/v64df_rint.c @@ -40,7 +40,7 @@ DEF_VD_MATH_FUNC (v64df, rint, v64df x) GET_HIGH_WORD (i0, t, cond2); SET_HIGH_WORD (t, (i0&0x7fffffff)|(sx<<31), cond2); VECTOR_RETURN (t, cond2); - VECTOR_ELSE (cond2) + VECTOR_ELSE2 (cond2, cond) i = (0x000fffff) >> j0; VECTOR_RETURN (x, cond2 & (((i0 & i) | i1) == 0)); /* x is integral */ i >>= 1; @@ -54,7 +54,7 @@ DEF_VD_MATH_FUNC (v64df, rint, v64df x) VECTOR_RETURN (x + x, cond & (j0 == 0x400)); VECTOR_RETURN (x, cond); VECTOR_ELSE (cond) - i = (0xffffffff) >> (j0 - 20); + i = CAST_VECTOR (v64si, VECTOR_INIT (0xffffffff) >> (j0 - 20)); VECTOR_RETURN (x, cond & ((i1 & i) == 0)); i >>= 1; VECTOR_COND_MOVE (i1, (i1 & (~i)) | (0x40000000 >> (j0 - 20)), cond & ((i1 & i) != 0)); diff --git a/libgcc/config/gcn/simd-math/v64sf_rint.c b/libgcc/config/gcn/simd-math/v64sf_rint.c index 60c348a9d67..8ebad4beae9 100644 --- a/libgcc/config/gcn/simd-math/v64sf_rint.c +++ b/libgcc/config/gcn/simd-math/v64sf_rint.c @@ -29,9 +29,7 @@ DEF_VS_MATH_FUNC (v64sf, rintf, v64sf x) v64si ix = (i0 & 0x7fffffff); v64si j0 = (ix >> 23) - 0x7f; VECTOR_IF (j0 < 23, cond) - VECTOR_IF2 (FLT_UWORD_IS_ZERO (ix), cond2, cond) - VECTOR_RETURN (x, cond2); - VECTOR_ENDIF + VECTOR_RETURN (x, cond & FLT_UWORD_IS_ZERO (ix)); VECTOR_IF2 (j0 < 0, cond2, cond) v64si i1 = (i0 & 0x07fffff); VECTOR_COND_MOVE (i0, i0 & 0xfff00000, cond2); @@ -42,22 +40,16 @@ DEF_VS_MATH_FUNC (v64sf, rintf, v64sf x) GET_FLOAT_WORD (i0, t, cond2); SET_FLOAT_WORD (t, (i0&0x7fffffff)|(sx<<31), cond2); VECTOR_RETURN (t, cond2); - VECTOR_ELSE (cond2) + VECTOR_ELSE2 (cond2, cond) v64si i = (0x007fffff) >> j0; - VECTOR_IF2 ((i0 & i) == 0, cond3, cond2) /* x is integral */ - VECTOR_RETURN (x, cond3); - VECTOR_ENDIF + VECTOR_RETURN (x, cond2 & ((i0 & i) == 0)); /* x is integral */ i >>= 1; - VECTOR_IF2 ((i0 & i) != 0, cond3, cond2) - VECTOR_COND_MOVE (i0, (i0 & (~i)) | ((0x200000) >> j0), cond3); - VECTOR_ENDIF + VECTOR_COND_MOVE (i0, (i0 & (~i)) | (0x200000 >> j0), + cond2 & ((i0 & i) != 0)); VECTOR_ENDIF VECTOR_ELSE (cond) - VECTOR_IF2 (~FLT_UWORD_IS_FINITE (ix), cond2, cond) /* inf or NaN */ - VECTOR_RETURN (x + x, cond2); - VECTOR_ELSE (cond2) /* x is integral */ - VECTOR_RETURN (x, cond2); - VECTOR_ENDIF + VECTOR_RETURN (x + x, cond & ~FLT_UWORD_IS_FINITE (ix)); /* inf or NaN */ + VECTOR_RETURN (x, cond); /* x is integral */ VECTOR_ENDIF SET_FLOAT_WORD (x, i0, NO_COND);