From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1729) id 9AFD03858D32; Tue, 8 Nov 2022 15:02:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9AFD03858D32 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667919743; bh=R9XPD9DHiihRISdXCvHpICsYXZrFpYoVV9WTAg/IhHI=; h=From:To:Subject:Date:From; b=vuggwY1LFvFPeU3q06c/VsqUg5dJYDyPRNkK2Y2DH+9SSIqU1r+rRq+HFB3t7ny56 zXtj8oz36HmH0Vot4YdWaMa2QWEFQIY1/LrfnOcDMFBb5V5/TTCkOAlcYOHbCtnpz/ J/qLcbuupaBDzCCW7wXW35Q7YU3XtNGS3VLBiakk= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kwok Yeung To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-3807] amdgcn: Add builtins for vectorized native versions of abs, floorf and floor X-Act-Checkin: gcc X-Git-Author: Kwok Cheung Yeung X-Git-Refname: refs/heads/master X-Git-Oldrev: b74dd1bbd2a02a0755bc882c6e64964b2a47ba5d X-Git-Newrev: ee2be8f3a49b0b1a24afa30801e15c4a93656047 Message-Id: <20221108150223.9AFD03858D32@sourceware.org> Date: Tue, 8 Nov 2022 15:02:23 +0000 (GMT) List-Id: https://gcc.gnu.org/g:ee2be8f3a49b0b1a24afa30801e15c4a93656047 commit r13-3807-gee2be8f3a49b0b1a24afa30801e15c4a93656047 Author: Kwok Cheung Yeung Date: Tue Nov 8 11:59:58 2022 +0000 amdgcn: Add builtins for vectorized native versions of abs, floorf and floor 2022-11-08 Kwok Cheung Yeung gcc/ * config/gcn/gcn-builtins.def (FABSV, FLOORVF, FLOORV): New builtins. * config/gcn/gcn.cc (gcn_expand_builtin_1): Expand GCN_BUILTIN_FABSV, GCN_BUILTIN_FLOORVF and GCN_BUILTIN_FLOORV. gcc/testsuite/ * gcc.target/gcn/math-builtins-1.c: New test. Diff: --- gcc/config/gcn/gcn-builtins.def | 15 ++++++++++++ gcc/config/gcn/gcn.cc | 33 ++++++++++++++++++++++++++ gcc/testsuite/gcc.target/gcn/math-builtins-1.c | 33 ++++++++++++++++++++++++++ 3 files changed, 81 insertions(+) diff --git a/gcc/config/gcn/gcn-builtins.def b/gcc/config/gcn/gcn-builtins.def index 27691909925..c50777bd3b0 100644 --- a/gcc/config/gcn/gcn-builtins.def +++ b/gcc/config/gcn/gcn-builtins.def @@ -64,6 +64,21 @@ DEF_BUILTIN (FABSVF, 3 /*CODE_FOR_fabsvf */, _A2 (GCN_BTI_V64SF, GCN_BTI_V64SF), gcn_expand_builtin_1) +DEF_BUILTIN (FABSV, 3 /*CODE_FOR_fabsv */, + "fabsv", B_INSN, + _A2 (GCN_BTI_V64DF, GCN_BTI_V64DF), + gcn_expand_builtin_1) + +DEF_BUILTIN (FLOORVF, 3 /*CODE_FOR_floorvf */, + "floorvf", B_INSN, + _A2 (GCN_BTI_V64SF, GCN_BTI_V64SF), + gcn_expand_builtin_1) + +DEF_BUILTIN (FLOORV, 3 /*CODE_FOR_floorv */, + "floorv", B_INSN, + _A2 (GCN_BTI_V64DF, GCN_BTI_V64DF), + gcn_expand_builtin_1) + DEF_BUILTIN (LDEXPVF, 3 /*CODE_FOR_ldexpvf */, "ldexpvf", B_INSN, _A3 (GCN_BTI_V64SF, GCN_BTI_V64SF, GCN_BTI_V64SI), diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc index 1996115a686..9c5e3419748 100644 --- a/gcc/config/gcn/gcn.cc +++ b/gcc/config/gcn/gcn.cc @@ -4329,6 +4329,39 @@ gcn_expand_builtin_1 (tree exp, rtx target, rtx /*subtarget */ , emit_insn (gen_absv64sf2 (target, arg)); return target; } + case GCN_BUILTIN_FABSV: + { + if (ignore) + return target; + rtx arg = force_reg (V64DFmode, + expand_expr (CALL_EXPR_ARG (exp, 0), NULL_RTX, + V64DFmode, + EXPAND_NORMAL)); + emit_insn (gen_absv64df2 (target, arg)); + return target; + } + case GCN_BUILTIN_FLOORVF: + { + if (ignore) + return target; + rtx arg = force_reg (V64SFmode, + expand_expr (CALL_EXPR_ARG (exp, 0), NULL_RTX, + V64SFmode, + EXPAND_NORMAL)); + emit_insn (gen_floorv64sf2 (target, arg)); + return target; + } + case GCN_BUILTIN_FLOORV: + { + if (ignore) + return target; + rtx arg = force_reg (V64DFmode, + expand_expr (CALL_EXPR_ARG (exp, 0), NULL_RTX, + V64DFmode, + EXPAND_NORMAL)); + emit_insn (gen_floorv64df2 (target, arg)); + return target; + } case GCN_BUILTIN_LDEXPVF: { if (ignore) diff --git a/gcc/testsuite/gcc.target/gcn/math-builtins-1.c b/gcc/testsuite/gcc.target/gcn/math-builtins-1.c new file mode 100644 index 00000000000..e1aadfb40d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/gcn/math-builtins-1.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +typedef float v64sf __attribute__ ((vector_size (256))); +typedef double v64df __attribute__ ((vector_size (512))); +typedef int v64si __attribute__ ((vector_size (256))); +typedef long v64di __attribute__ ((vector_size (512))); + +v64sf f (v64sf _x, v64si _y) +{ + v64sf x = _x; + v64si y = _y; + x = __builtin_gcn_fabsvf (x); /* { dg-final { scan-assembler "v_add_f32\\s+v\[0-9\]+, 0, |v\[0-9\]+|" } } */ + x = __builtin_gcn_floorvf (x); /* { dg-final { scan-assembler "v_floor_f32\\s+v\[0-9\]+, v\[0-9\]+" } }*/ + x = __builtin_gcn_frexpvf_mant (x); /* { dg-final { scan-assembler "v_frexp_mant_f32\\s+v\[0-9\]+, v\[0-9\]+" } }*/ + y = __builtin_gcn_frexpvf_exp (x); /* { dg-final { scan-assembler "v_frexp_exp_i32_f32\\s+v\[0-9\]+, v\[0-9\]+" } }*/ + x = __builtin_gcn_ldexpvf (x, y); /* { dg-final { scan-assembler "v_ldexp_f32\\s+v\[0-9\]+, v\[0-9\]+, v\[0-9\]+" } }*/ + + return x; +} + +v64df g (v64df _x, v64si _y) +{ + v64df x = _x; + v64si y = _y; + x = __builtin_gcn_fabsv (x); /* { dg-final { scan-assembler "v_add_f64\\s+v\\\[\[0-9\]+:\[0-9]+\\\], 0, |v\\\[\[0-9\]+:\[0-9\]+\\\]|" } } */ + x = __builtin_gcn_floorv (x); /* { dg-final { scan-assembler "v_floor_f64\\s+v\\\[\[0-9\]+:\[0-9]+\\\], v\\\[\[0-9\]+:\[0-9]+\\\]" } }*/ + x = __builtin_gcn_frexpv_mant (x); /* { dg-final { scan-assembler "v_frexp_mant_f64\\s+v\\\[\[0-9\]+:\[0-9]+\\\], v\\\[\[0-9\]+:\[0-9]+\\\]" } }*/ + y = __builtin_gcn_frexpv_exp (x); /* { dg-final { scan-assembler "v_frexp_exp_i32_f64\\s+v\[0-9\]+, v\\\[\[0-9\]+:\[0-9]+\\\]" } }*/ + x = __builtin_gcn_ldexpv (x, y); /* { dg-final { scan-assembler "v_ldexp_f64\\s+v\\\[\[0-9\]+:\[0-9]+\\\], v\\\[\[0-9\]+:\[0-9]+\\\], v\[0-9\]+" } }*/ + + return x; +}