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From: Philipp Tomsich <ptomsich@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-3845] RISC-V: costs: handle BSWAP Date: Wed, 9 Nov 2022 09:31:56 +0000 (GMT) [thread overview] Message-ID: <20221109093156.7107A3858D20@sourceware.org> (raw) https://gcc.gnu.org/g:e7c8f5005bf87e4bd95b25fb31430eef7e58097e commit r13-3845-ge7c8f5005bf87e4bd95b25fb31430eef7e58097e Author: Philipp Tomsich <philipp.tomsich@vrull.eu> Date: Fri Dec 18 10:00:34 2020 +0100 RISC-V: costs: handle BSWAP The BSWAP operation is not handled in rtx_costs. Add it. With Zbb, BSWAP for XLEN is a single instruction; for smaller modes, it will expand into two. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_rtx_costs): Add BSWAP. Diff: --- gcc/config/riscv/riscv.cc | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 32f9ef9ade9..ab6c745c722 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -2562,6 +2562,16 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN *total = riscv_extend_cost (XEXP (x, 0), GET_CODE (x) == ZERO_EXTEND); return false; + case BSWAP: + if (TARGET_ZBB) + { + /* RISC-V only defines rev8 for XLEN, so we will need an extra + shift-right instruction for smaller modes. */ + *total = COSTS_N_INSNS (mode == word_mode ? 1 : 2); + return true; + } + return false; + case FLOAT: case UNSIGNED_FLOAT: case FIX:
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