[gcc r13-4094] doc: fix description of -mrelax-cmpxchg-loop [PR 107676]

[Alexander Monakov <amonakov@gcc.gnu.org>]

https://gcc.gnu.org/g:85966f0d20baf50a767ac1110f537395441604a9

commit r13-4094-g85966f0d20baf50a767ac1110f537395441604a9
Author: Alexander Monakov <amonakov@ispras.ru>
Date:   Wed Nov 16 16:33:11 2022 +0300

    doc: fix description of -mrelax-cmpxchg-loop [PR 107676]
    
    gcc/ChangeLog:
    
            PR target/107676
            * doc/invoke.texi (-mrelax-cmpxchg-loop): Reword description.

Diff:
---
 gcc/doc/invoke.texi | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index cbfe1102bd2..96f0b6d08bd 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -33561,10 +33561,11 @@ registers.
 
 @item -mrelax-cmpxchg-loop
 @opindex mrelax-cmpxchg-loop
-Relax cmpxchg loop by emitting an early load and compare before cmpxchg,
-execute pause if load value is not expected. This reduces excessive
-cachline bouncing when and works for all atomic logic fetch builtins
-that generates compare and swap loop.
+When emitting a compare-and-swap loop for @ref{__sync Builtins}
+and @ref{__atomic Builtins} lacking a native instruction, optimize
+for the highly contended case by issuing an atomic load before the
+@code{CMPXCHG} instruction, and using the @code{PAUSE} instruction
+to save CPU power when restarting the loop.
 
 @item -mindirect-branch=@var{choice}
 @opindex mindirect-branch