[gcc(refs/vendors/vrull/heads/for-upstream)] RISC-V: Optimize masking with two clear bits not a SMALL_OPERAND

[Philipp Tomsich <ptomsich@gcc.gnu.org>]

https://gcc.gnu.org/g:5fdf1e0dcfc8ee3a6df645251be91b63e3347183

commit 5fdf1e0dcfc8ee3a6df645251be91b63e3347183
Author: Philipp Tomsich <philipp.tomsich@vrull.eu>
Date:   Thu Oct 13 10:55:41 2022 +0200

    RISC-V: Optimize masking with two clear bits not a SMALL_OPERAND
    
    Add a split for cases where we can use two bclri (or one bclri and an
    andi) to clear two bits.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (*bclri<mode>_nottwobits): New pattern.
            (*bclridisi_nottwobits): New pattern, handling the sign-bit.
            * config/riscv/predicates.md (const_nottwobits_operand):
            New predicate.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/zbs-bclri.c: New test.
    
    Series-to: gcc-patches@gcc.gnu.org
    Series-cc: Palmer Dabbelt <palmer@rivosinc.com>
    Series-cc: Vineet Gupta <vineetg@rivosinc.com>
    Series-cc: Christoph Muellner <christoph.muellner@vrull.eu>
    Series-cc: Kito Cheng <kito.cheng@gmail.com>
    Series-cc: Jeff Law <jlaw@ventanamicro.com>

Diff:
---
 gcc/config/riscv/predicates.md | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 9058851df33..5ee1422364b 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -309,6 +309,11 @@
        (match_test "ctz_hwi (INTVAL (op)) > 0")
        (match_test "SMALL_OPERAND (INTVAL (op) >> ctz_hwi (INTVAL (op)))")))
 
+;; A CONST_INT operand that has exactly two bits cleared.
+(define_predicate "const_nottwobits_operand"
+  (and (match_code "const_int")
+       (match_test "popcount_hwi (~UINTVAL (op)) == 2")))
+
 ;; A CONST_INT operand that fits into the unsigned half of a
 ;; signed-immediate after the top bit has been cleared.
 (define_predicate "uimm_extra_bit_operand"