From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2153) id 59DF93858D32; Sun, 20 Nov 2022 23:11:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 59DF93858D32 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1668985903; bh=jMts/oSzAStyDHtS2OuB/+D3OzMF9w9wE0VGWYbpMGg=; h=From:To:Subject:Date:From; b=EihyBgZumjUffJlLNQsjKkjLzX3O3ntTQJ2CBckC458skPNsEJNSY7FCw020b1VbF UDBAHZvF1Q7wMWgAzqhhi2pcQdYhP2Sd0RRh+KyqkZFitBujVzddCk7So8kmGXBJcz NDOuQUkcL5v1dECVpDORRwPXHQAlarH2v/9aZP/M= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Jakub Jelinek To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-8920] libatomic: Handle AVX+CX16 AMD like Intel for 16b atomics [PR104688] X-Act-Checkin: gcc X-Git-Author: Jakub Jelinek X-Git-Refname: refs/heads/releases/gcc-12 X-Git-Oldrev: fab0fce5c198b4cc51e07caca6421928b832efe2 X-Git-Newrev: 86dea99d8525bf49d51636332d6be440e51b931a Message-Id: <20221120231143.59DF93858D32@sourceware.org> Date: Sun, 20 Nov 2022 23:11:42 +0000 (GMT) List-Id: https://gcc.gnu.org/g:86dea99d8525bf49d51636332d6be440e51b931a commit r12-8920-g86dea99d8525bf49d51636332d6be440e51b931a Author: Jakub Jelinek Date: Tue Nov 15 08:14:45 2022 +0100 libatomic: Handle AVX+CX16 AMD like Intel for 16b atomics [PR104688] We got a response from AMD in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688#c10 so the following patch starts treating AMD with AVX and CMPXCHG16B ISAs like Intel by using vmovdqa for atomic load/store in libatomic. We still don't have confirmation from Zhaoxin and VIA (anything else with CPUs featuring AVX and CX16?). 2022-11-15 Jakub Jelinek PR target/104688 * config/x86/init.c (__libat_feat1_init): Don't clear bit_AVX on AMD CPUs. (cherry picked from commit 4a7a846687e076eae58ad3ea959245b2bf7fdc07) Diff: --- libatomic/config/x86/init.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/libatomic/config/x86/init.c b/libatomic/config/x86/init.c index 6f6499c58c3..10e1c5f5dbb 100644 --- a/libatomic/config/x86/init.c +++ b/libatomic/config/x86/init.c @@ -39,10 +39,12 @@ __libat_feat1_init (void) == (bit_AVX | bit_CMPXCHG16B)) { /* Intel SDM guarantees that 16-byte VMOVDQA on 16-byte aligned address - is atomic, but so far we don't have this guarantee from AMD. */ + is atomic, and AMD is going to do something similar soon. + We don't have a guarantee from vendors of other CPUs with AVX, + like Zhaoxin and VIA. */ unsigned int ecx2 = 0; __get_cpuid (0, &eax, &ebx, &ecx2, &edx); - if (ecx2 != signature_INTEL_ecx) + if (ecx2 != signature_INTEL_ecx && ecx2 != signature_AMD_ecx) FEAT1_REGISTER &= ~bit_AVX; } #endif