From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2092) id 220F0385B1A5; Mon, 28 Nov 2022 09:11:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 220F0385B1A5 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669626679; bh=mIOAEEdALQQ+Up6TJ7mEAsBaGuq/I0hrjWzsTFJfOtA=; h=From:To:Subject:Date:From; b=pe8Cqo31IfV72yhcPTW/g8gpmP6s3qBAEBYqdjUxvT0tPd6+7Lwa12wKbznpYAzYX gddX/ef/O90A+uxy2cD3iTmNMmAnFmGbOilZf5+6JVnje+0WCTsXtTzwMnY6ZaQBBw GqPB99N+5gXXE8759f384Q48ymIc98Vzv+m/irz8= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Andrea Corallo To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-4323] arm: improve tests and fix vdupq* X-Act-Checkin: gcc X-Git-Author: Andrea Corallo X-Git-Refname: refs/heads/trunk X-Git-Oldrev: e9fe7b23b82942faffcdf4803eda4ade7b708a8a X-Git-Newrev: 7827909fb2ffa3517ada8fae6e41873fb1cbe47a Message-Id: <20221128091119.220F0385B1A5@sourceware.org> Date: Mon, 28 Nov 2022 09:11:19 +0000 (GMT) List-Id: https://gcc.gnu.org/g:7827909fb2ffa3517ada8fae6e41873fb1cbe47a commit r13-4323-g7827909fb2ffa3517ada8fae6e41873fb1cbe47a Author: Andrea Corallo Date: Mon Oct 10 11:45:13 2022 +0200 arm: improve tests and fix vdupq* gcc/ChangeLog: * config/arm/mve.md (mve_vdupq_n_f) (mve_vdupq_n_, mve_vdupq_m_n_) (mve_vdupq_m_n_f): Fix spacing. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Improve test. * gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise. Diff: --- gcc/config/arm/mve.md | 8 ++--- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c | 41 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c | 41 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c | 25 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c | 25 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c | 25 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c | 41 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c | 41 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c | 41 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_n_f16.c | 21 ++++++++++- .../gcc.target/arm/mve/intrinsics/vdupq_n_f32.c | 21 ++++++++++- .../gcc.target/arm/mve/intrinsics/vdupq_n_s16.c | 13 +++++-- .../gcc.target/arm/mve/intrinsics/vdupq_n_s32.c | 13 +++++-- .../gcc.target/arm/mve/intrinsics/vdupq_n_s8.c | 9 ++++- .../gcc.target/arm/mve/intrinsics/vdupq_n_u16.c | 23 ++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_n_u32.c | 23 ++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_n_u8.c | 23 ++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c | 30 ++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c | 30 ++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c | 14 ++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c | 14 ++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c | 14 ++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c | 30 ++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c | 30 ++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c | 30 ++++++++++++++-- 25 files changed, 567 insertions(+), 59 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 58ffe03c499..6d5270281ec 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -266,7 +266,7 @@ VDUPQ_N_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vdup.%# %q0, %1" + "vdup.%#\t%q0, %1" [(set_attr "type" "mve_move") ]) @@ -435,7 +435,7 @@ VDUPQ_N)) ] "TARGET_HAVE_MVE" - "vdup.%# %q0, %1" + "vdup.%#\t%q0, %1" [(set_attr "type" "mve_move") ]) @@ -3046,7 +3046,7 @@ VDUPQ_M_N)) ] "TARGET_HAVE_MVE" - "vpst\;vdupt.%# %q0, %2" + "vpst\;vdupt.%#\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3991,7 +3991,7 @@ VDUPQ_M_N_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vdupt.%# %q0, %2" + "vpst\;vdupt.%#\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c index 0b749be3527..bfa471bcb31 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c @@ -1,22 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16_t a, mve_pred16_t p) { return vdupq_m_n_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16_t a, mve_pred16_t p) { return vdupq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo2 (float16x8_t inactive, mve_pred16_t p) +{ + return vdupq_m (inactive, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c index 9cca5310c7a..e1dd8f58ad0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c @@ -1,22 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32_t a, mve_pred16_t p) { return vdupq_m_n_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32_t a, mve_pred16_t p) { return vdupq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo2 (float32x4_t inactive, mve_pred16_t p) +{ + return vdupq_m (inactive, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c index b521f13e94f..52304ace03a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16_t a, mve_pred16_t p) { return vdupq_m_n_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16_t a, mve_pred16_t p) { return vdupq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c index 96aa195dc18..44a80c5d5bc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32_t a, mve_pred16_t p) { return vdupq_m_n_s32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32_t a, mve_pred16_t p) { return vdupq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c index f1d222000c1..1630a3b9234 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8_t a, mve_pred16_t p) { return vdupq_m_n_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8_t a, mve_pred16_t p) { return vdupq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c index 39d0c9f502d..d3df8b69248 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c @@ -1,22 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16_t a, mve_pred16_t p) { return vdupq_m_n_u16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16_t a, mve_pred16_t p) { return vdupq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t inactive, mve_pred16_t p) +{ + return vdupq_m (inactive, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c index fc107172e16..e6bb0cc2c38 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c @@ -1,22 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p) { return vdupq_m_n_u32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p) { return vdupq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t inactive, mve_pred16_t p) +{ + return vdupq_m (inactive, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c index 9fd3bc443cb..ad6f6d04ae3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c @@ -1,22 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8_t a, mve_pred16_t p) { return vdupq_m_n_u8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8_t a, mve_pred16_t p) { return vdupq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t inactive, mve_pred16_t p) +{ + return vdupq_m (inactive, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c index 62bfc194533..fc5a7933653 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c @@ -1,13 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16_t a) { return vdupq_n_f16 (a); } -/* { dg-final { scan-assembler "vdup.16" } } */ +/* +**foo1: +** ... +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo1 () +{ + return vdupq_n_f16 (1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c index f5ad2286d8d..a6be82e5927 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c @@ -1,13 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32_t a) { return vdupq_n_f32 (a); } -/* { dg-final { scan-assembler "vdup.32" } } */ +/* +**foo1: +** ... +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo1 () +{ + return vdupq_n_f32 (1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c index 1378522a18e..f842b96c3b1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c @@ -1,13 +1,20 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16_t a) { return vdupq_n_s16 (a); } -/* { dg-final { scan-assembler "vdup.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c index 43affe856c0..05cbff8fdae 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c @@ -1,13 +1,20 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32_t a) { return vdupq_n_s32 (a); } -/* { dg-final { scan-assembler "vdup.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c index 3f934dc5d59..1d141161604 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c @@ -1,13 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8_t a) { return vdupq_n_s8 (a); } -/* { dg-final { scan-assembler "vdup.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c index 93268643fec..4839d427e65 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c @@ -1,13 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16_t a) { - return vdupq_n_u16 (a); + return vdupq_n_u16 (a); } -/* { dg-final { scan-assembler "vdup.16" } } */ +/* +**foo1: +** ... +** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo1 () +{ + return vdupq_n_u16 (1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c index 276e9ddc67f..f0069eb7280 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c @@ -1,13 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32_t a) { - return vdupq_n_u32 (a); + return vdupq_n_u32 (a); } -/* { dg-final { scan-assembler "vdup.32" } } */ +/* +**foo1: +** ... +** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo1 () +{ + return vdupq_n_u32 (1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c index d0361c15047..fe26687ae45 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c @@ -1,13 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8_t a) { - return vdupq_n_u8 (a); + return vdupq_n_u8 (a); } -/* { dg-final { scan-assembler "vdup.8" } } */ +/* +**foo1: +** ... +** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo1 () +{ + return vdupq_n_u8 (1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c index c91ee62791c..11ebb47f94f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c @@ -1,14 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16_t a, mve_pred16_t p) { return vdupq_x_n_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo1 (mve_pred16_t p) +{ + return vdupq_x_n_f16 (1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c index c2b39051f5b..4e79bd54f71 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c @@ -1,14 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32_t a, mve_pred16_t p) { return vdupq_x_n_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo1 (mve_pred16_t p) +{ + return vdupq_x_n_f32 (1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c index cc8a5bfeca1..90288777df7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c @@ -1,14 +1,24 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16_t a, mve_pred16_t p) { return vdupq_x_n_s16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c index b3ed3eb68e8..c4c906e0682 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c @@ -1,14 +1,24 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32_t a, mve_pred16_t p) { return vdupq_x_n_s32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c index 3be865dcc84..6234730827e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c @@ -1,14 +1,24 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8_t a, mve_pred16_t p) { return vdupq_x_n_s8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c index d01338aeb91..821fcddcab1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c @@ -1,14 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16_t a, mve_pred16_t p) { return vdupq_x_n_u16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo1 (mve_pred16_t p) +{ + return vdupq_x_n_u16 (1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c index 8fa7d4552bc..20125df6226 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c @@ -1,14 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32_t a, mve_pred16_t p) { return vdupq_x_n_u32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo1 (mve_pred16_t p) +{ + return vdupq_x_n_u32 (1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c index 96ad899c9c2..defaaeebfcf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c @@ -1,14 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8_t a, mve_pred16_t p) { return vdupq_x_n_u8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vdupt.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo1 (mve_pred16_t p) +{ + return vdupq_x_n_u8 (1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file