From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2092) id CDE913854553; Mon, 28 Nov 2022 09:12:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CDE913854553 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669626735; bh=UDPQv7b+mkHUpH+r5dnOtbQSEPlPEOQAEMlTFyDz3Pc=; h=From:To:Subject:Date:From; b=syRguLKsYkb52TmDA4eyEr7KrsiDwbhzxmGF39jKxQbRlpmpcaHjpSpS6DKE4qqxB j0WPDBdAdWcNvMJgKGAzPbrx1diil3rOIECl90T0NM/jEtxRSct7OWMd1G03bfr21J BHW2TddG8Vcen0iiuLRp94RecbRZenKN/IxZ4YAc= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Andrea Corallo To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-4334] arm: improve tests and fix vadd* X-Act-Checkin: gcc X-Git-Author: Andrea Corallo X-Git-Refname: refs/heads/trunk X-Git-Oldrev: bf6b04c6baa12fccc0dad53d45ae808def34fb6c X-Git-Newrev: 78b5b76f935f5ba3a5d4b58ccd0ab21b7bfe6f39 Message-Id: <20221128091215.CDE913854553@sourceware.org> Date: Mon, 28 Nov 2022 09:12:15 +0000 (GMT) List-Id: https://gcc.gnu.org/g:78b5b76f935f5ba3a5d4b58ccd0ab21b7bfe6f39 commit r13-4334-g78b5b76f935f5ba3a5d4b58ccd0ab21b7bfe6f39 Author: Andrea Corallo Date: Tue Nov 15 10:29:31 2022 +0100 arm: improve tests and fix vadd* gcc/ChangeLog: * config/arm/mve.md (mve_vaddlvq_p_v4si) (mve_vaddq_n_, mve_vaddvaq_) (mve_vaddlvaq_v4si, mve_vaddq_n_f) (mve_vaddlvaq_p_v4si, mve_vaddq, mve_vaddq_f): Fix spacing. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Improve test. * gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise. Diff: --- gcc/config/arm/mve.md | 18 +++++----- .../gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c | 40 +++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddlvq_s32.c | 22 +++++++++--- .../gcc.target/arm/mve/intrinsics/vaddlvq_u32.c | 20 ++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_f16.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_f32.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_m_f16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_f32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_s16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_s32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_s8.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_u16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_u32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_m_u8.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_n_f16.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_n_f32.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_n_s16.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_n_s32.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_n_s8.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_n_u16.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_n_u32.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_n_u8.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_s16.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_s32.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_s8.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_u16.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_u32.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_u8.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddq_x_f16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_f32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_s16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_s32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_s8.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_u16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_u32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddq_x_u8.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c | 40 +++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c | 40 +++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c | 40 +++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_s16.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_s32.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_s8.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_u16.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_u32.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvaq_u8.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c | 24 +++++++++++-- .../gcc.target/arm/mve/intrinsics/vaddvq_s16.c | 22 +++++++++--- .../gcc.target/arm/mve/intrinsics/vaddvq_s32.c | 22 +++++++++--- .../gcc.target/arm/mve/intrinsics/vaddvq_s8.c | 20 ++++++++--- .../gcc.target/arm/mve/intrinsics/vaddvq_u16.c | 20 ++++++++--- .../gcc.target/arm/mve/intrinsics/vaddvq_u32.c | 20 ++++++++--- .../gcc.target/arm/mve/intrinsics/vaddvq_u8.c | 20 ++++++++--- 81 files changed, 1864 insertions(+), 252 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index bc4e2f2ac21..5ce2a289225 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -636,7 +636,7 @@ VADDLVQ)) ] "TARGET_HAVE_MVE" - "vaddlv.32 %Q0, %R0, %q1" + "vaddlv.32\t%Q0, %R0, %q1" [(set_attr "type" "mve_move") ]) @@ -817,7 +817,7 @@ VADDLVQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vaddlvt.32 %Q0, %R0, %q1" + "vpst\;vaddlvt.32\t%Q0, %R0, %q1" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -879,7 +879,7 @@ VADDQ_N)) ] "TARGET_HAVE_MVE" - "vadd.i%# %q0, %q1, %2" + "vadd.i%#\t%q0, %q1, %2" [(set_attr "type" "mve_move") ]) @@ -894,7 +894,7 @@ VADDVAQ)) ] "TARGET_HAVE_MVE" - "vaddva.%# %0, %q2" + "vaddva.%#\t%0, %q2" [(set_attr "type" "mve_move") ]) @@ -1834,7 +1834,7 @@ VADDLVAQ)) ] "TARGET_HAVE_MVE" - "vaddlva.32 %Q0, %R0, %q2" + "vaddlva.32\t%Q0, %R0, %q2" [(set_attr "type" "mve_move") ]) @@ -1849,7 +1849,7 @@ VADDQ_N_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vadd.f%# %q0, %q1, %2" + "vadd.f%#\t%q0, %q1, %2" [(set_attr "type" "mve_move") ]) @@ -3717,7 +3717,7 @@ VADDLVAQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vaddlvat.32 %Q0, %R0, %q2" + "vpst\;vaddlvat.32\t%Q0, %R0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) ;; @@ -8928,7 +8928,7 @@ (match_operand:MVE_2 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE" - "vadd.i%# %q0, %q1, %q2" + "vadd.i%#\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -8942,7 +8942,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vadd.f%# %q0, %q1, %q2" + "vadd.f%#\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c index 0991ac1b355..3a9504df94e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddlvat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, mve_pred16_t p) { return vaddlvaq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vaddlvat.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddlvat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, mve_pred16_t p) { return vaddlvaq_p (a, b, p); } -/* { dg-final { scan-assembler "vaddlvat.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c index 5af786e8e76..6e2613ee099 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c @@ -1,21 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddlvat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo (uint64_t a, uint32x4_t b, mve_pred16_t p) { return vaddlvaq_p_u32 (a, b, p); } -/* { dg-final { scan-assembler "vaddlvat.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddlvat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo1 (uint64_t a, uint32x4_t b, mve_pred16_t p) { return vaddlvaq_p (a, b, p); } -/* { dg-final { scan-assembler "vaddlvat.u32" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddlvat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint64_t +foo2 (uint32x4_t b, mve_pred16_t p) +{ + return vaddlvaq_p (1, b, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c index 78f155f1586..180dc9b2deb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddlva.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b) { return vaddlvaq_s32 (a, b); } -/* { dg-final { scan-assembler "vaddlva.s32" } } */ +/* +**foo1: +** ... +** vaddlva.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b) { return vaddlvaq (a, b); } -/* { dg-final { scan-assembler "vaddlva.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c index a7dfa2541ab..1f899e92c3c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddlva.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo (uint64_t a, uint32x4_t b) { return vaddlvaq_u32 (a, b); } -/* { dg-final { scan-assembler "vaddlva.u32" } } */ +/* +**foo1: +** ... +** vaddlva.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo1 (uint64_t a, uint32x4_t b) { return vaddlvaq (a, b); } -/* { dg-final { scan-assembler "vaddlva.u32" } } */ +/* +**foo2: +** ... +** vaddlva.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint64_t +foo2 (uint32x4_t b) +{ + return vaddlvaq (1, b); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c index 8aa18323b53..5b22da49c1d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddlvt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, mve_pred16_t p) { return vaddlvq_p_s32 (a, p); } -/* { dg-final { scan-assembler "vaddlvt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddlvt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, mve_pred16_t p) { return vaddlvq_p (a, p); } -/* { dg-final { scan-assembler "vaddlvt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c index a9cee74e2ee..2c85139435a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddlvt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo (uint32x4_t a, mve_pred16_t p) { return vaddlvq_p_u32 (a, p); } -/* { dg-final { scan-assembler "vaddlvt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddlvt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo1 (uint32x4_t a, mve_pred16_t p) { return vaddlvq_p (a, p); } -/* { dg-final { scan-assembler "vaddlvt.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c index 4bd70aacc05..bdb04b5214f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c @@ -1,21 +1,33 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddlv.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a) { return vaddlvq_s32 (a); } -/* { dg-final { scan-assembler "vaddlv.s32" } } */ +/* +**foo1: +** ... +** vaddlv.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a) { - return vaddlvq_s32 (a); + return vaddlvq (a); } -/* { dg-final { scan-assembler "vaddlv.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c index 2148bd9a32e..bcd9d21df4f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddlv.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo (uint32x4_t a) { - return vaddlvq_u32 (a); + return vaddlvq_u32 (a); } -/* { dg-final { scan-assembler "vaddlv.u32" } } */ +/* +**foo1: +** ... +** vaddlv.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo1 (uint32x4_t a) { - return vaddlvq (a); + return vaddlvq (a); } -/* { dg-final { scan-assembler "vaddlv.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c index 3d1100a9e81..58462177473 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return vaddq_f16 (a, b); } -/* { dg-final { scan-assembler "vadd.f16" } } */ +/* +**foo1: +** ... +** vadd.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c index e15e0d13e4f..f3fcd286f4d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return vaddq_f32 (a, b); } -/* { dg-final { scan-assembler "vadd.f32" } } */ +/* +**foo1: +** ... +** vadd.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c index 51d7020bd1f..291e65f32cc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vaddq_m_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c index 7821bc241ff..0346f65a330 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vaddq_m_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c index 796bed47613..9d57bbd27b9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) { return vaddq_m_n_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f16" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) +{ + return vaddq_m (inactive, a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c index afa3c4c722e..9939aa0012d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) { return vaddq_m_n_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f32" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) +{ + return vaddq_m (inactive, a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c index 0ef433724ba..50b138fc763 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vaddq_m_n_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c index 46ac88e940d..66c2be777ce 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vaddq_m_n_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c index 1867d5603d1..87dba75dff1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) { return vaddq_m_n_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c index 1da993b5e31..a8e9ea576b3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) { return vaddq_m_n_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) +{ + return vaddq_m (inactive, a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c index d7404c9f4ce..045e5024d5d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) { return vaddq_m_n_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) +{ + return vaddq_m (inactive, a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c index 013e83938b2..3d17afcbe56 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) { return vaddq_m_n_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) +{ + return vaddq_m (inactive, a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c index 244c88fcf89..87210a41dae 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vaddq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c index 7a59d75af11..1acb0b67fa9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vaddq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c index 5b8c74ab017..6136c54cbb8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vaddq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c index f28e3d789ab..b60d98e0691 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vaddq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c index aeb836ce87d..d56bbae9b03 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vaddq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c index c698df3a146..9f0b623c3e8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vaddq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c index 024fab5c0b2..5df23a6e61f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16_t b) { return vaddq_n_f16 (a, b); } -/* { dg-final { scan-assembler "vadd.f16" } } */ +/* +**foo1: +** ... +** vadd.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.f16" } } */ +/* +**foo2: +** ... +** vadd.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo2 (float16x8_t a) +{ + return vaddq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c index 06b1528460e..d07927c427e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32_t b) { return vaddq_n_f32 (a, b); } -/* { dg-final { scan-assembler "vadd.f32" } } */ +/* +**foo1: +** ... +** vadd.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.f32" } } */ +/* +**foo2: +** ... +** vadd.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo2 (float32x4_t a) +{ + return vaddq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c index 63765f41deb..9ae30406f51 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16_t b) { return vaddq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vadd.i16" } } */ +/* +**foo1: +** ... +** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c index e462fbfab8e..3271d4d5af1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b) { return vaddq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vadd.i32" } } */ +/* +**foo1: +** ... +** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c index ad7181fd8f5..119fd5d5528 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8_t b) { return vaddq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vadd.i8" } } */ +/* +**foo1: +** ... +** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c index dac7a9fb9ba..ef0722e4dcd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16_t b) { return vaddq_n_u16 (a, b); } -/* { dg-final { scan-assembler "vadd.i16" } } */ +/* +**foo1: +** ... +** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i16" } } */ +/* +**foo2: +** ... +** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t a) +{ + return vaddq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c index 2f1feb89d32..67513819f39 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32_t b) { return vaddq_n_u32 (a, b); } -/* { dg-final { scan-assembler "vadd.i32" } } */ +/* +**foo1: +** ... +** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i32" } } */ +/* +**foo2: +** ... +** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t a) +{ + return vaddq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c index 325bdade765..2aa79e5e916 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8_t b) { return vaddq_n_u8 (a, b); } -/* { dg-final { scan-assembler "vadd.i8" } } */ +/* +**foo1: +** ... +** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i8" } } */ +/* +**foo2: +** ... +** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t a) +{ + return vaddq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c index 31f6cb42e9f..24b12a6aee1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vaddq_s16 (a, b); } -/* { dg-final { scan-assembler "vadd.i16" } } */ +/* +**foo1: +** ... +** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c index 96aead168cc..3fdfa3d86e6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vaddq_s32 (a, b); } -/* { dg-final { scan-assembler "vadd.i32" } } */ +/* +**foo1: +** ... +** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c index 6676a2e269b..6b32b8ccfd5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vaddq_s8 (a, b); } -/* { dg-final { scan-assembler "vadd.i8" } } */ +/* +**foo1: +** ... +** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c index 1b19876e09a..0deefa14ac6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vaddq_u16 (a, b); } -/* { dg-final { scan-assembler "vadd.i16" } } */ +/* +**foo1: +** ... +** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c index 8f5acc69e79..44df963f0f8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vaddq_u32 (a, b); } -/* { dg-final { scan-assembler "vadd.i32" } } */ +/* +**foo1: +** ... +** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c index e5be2fa1b59..7349fa165bf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vaddq_u8 (a, b); } -/* { dg-final { scan-assembler "vadd.i8" } } */ +/* +**foo1: +** ... +** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vaddq (a, b); } -/* { dg-final { scan-assembler "vadd.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c index bd2a198eb72..b1d48a1d260 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vaddq_x_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c index 5369f4d4876..047043d6526 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vaddq_x_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c index d2eed8cf66f..ed67007df51 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16_t b, mve_pred16_t p) { return vaddq_x_n_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f16" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo2 (float16x8_t a, mve_pred16_t p) +{ + return vaddq_x (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c index 40d56da12b1..fa17d6b4aa2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32_t b, mve_pred16_t p) { return vaddq_x_n_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.f32" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo2 (float32x4_t a, mve_pred16_t p) +{ + return vaddq_x (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c index e974cdf914b..d6c3252132a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16_t b, mve_pred16_t p) { return vaddq_x_n_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c index a6ac9ccd3af..c2a861706d9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vaddq_x_n_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c index f5539ef9c67..abc90a4c86b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8_t b, mve_pred16_t p) { return vaddq_x_n_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c index f167df122a0..8866a07bc8e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vaddq_x_n_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t a, mve_pred16_t p) +{ + return vaddq_x (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c index 653c3eed7a0..4123ad594ed 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vaddq_x_n_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t a, mve_pred16_t p) +{ + return vaddq_x (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c index 0ad65c8dde5..d610930a311 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vaddq_x_n_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t a, mve_pred16_t p) +{ + return vaddq_x (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c index 75b1491e17d..323010a6d33 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vaddq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c index 1aadebda459..98773e7ba6f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vaddq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c index d6b07cee79a..bff0bda1109 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vaddq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c index 5c9abc2492a..85f5cd4db7a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vaddq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c index d55ec735460..ad0e7afbc39 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vaddq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c index bcc058b3769..a3cfc5686e2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vaddq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vaddt.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c index c4bfe34aa91..16b51514be1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int16x8_t b, mve_pred16_t p) { return vaddvaq_p_s16 (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int16x8_t b, mve_pred16_t p) { return vaddvaq_p (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c index cdc32807a24..bbf04aa0d08 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int32x4_t b, mve_pred16_t p) { return vaddvaq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int32x4_t b, mve_pred16_t p) { return vaddvaq_p (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c index d330411115a..f06623b1893 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int8x16_t b, mve_pred16_t p) { return vaddvaq_p_s8 (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int8x16_t b, mve_pred16_t p) { return vaddvaq_p (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c index 74d9246cd63..7bfb4bb9cbe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c @@ -1,21 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, uint16x8_t b, mve_pred16_t p) { return vaddvaq_p_u16 (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, uint16x8_t b, mve_pred16_t p) { return vaddvaq_p (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.u16" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint32_t +foo2 (uint16x8_t b, mve_pred16_t p) +{ + return vaddvaq_p (1, b, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c index e4ec42b2544..9aea5caa4fe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c @@ -1,21 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, uint32x4_t b, mve_pred16_t p) { return vaddvaq_p_u32 (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p) { return vaddvaq_p (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.u32" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint32_t +foo2 (uint32x4_t b, mve_pred16_t p) +{ + return vaddvaq_p (1, b, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c index f9bed8379a4..b5113b209c0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c @@ -1,21 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, uint8x16_t b, mve_pred16_t p) { return vaddvaq_p_u8 (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, uint8x16_t b, mve_pred16_t p) { return vaddvaq_p (a, b, p); } -/* { dg-final { scan-assembler "vaddvat.u8" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvat.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint32_t +foo2 (uint8x16_t b, mve_pred16_t p) +{ + return vaddvaq_p (1, b, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c index 5f6a8cf9d89..1b9af185a0d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddva.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int16x8_t b) { return vaddvaq_s16 (a, b); } -/* { dg-final { scan-assembler "vaddva.s16" } } */ +/* +**foo1: +** ... +** vaddva.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int16x8_t b) { return vaddvaq (a, b); } -/* { dg-final { scan-assembler "vaddva.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c index 29e27f59328..e25487954d2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddva.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int32x4_t b) { return vaddvaq_s32 (a, b); } -/* { dg-final { scan-assembler "vaddva.s32" } } */ +/* +**foo1: +** ... +** vaddva.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int32x4_t b) { return vaddvaq (a, b); } -/* { dg-final { scan-assembler "vaddva.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c index cac43464679..d37c916c94d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddva.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int8x16_t b) { return vaddvaq_s8 (a, b); } -/* { dg-final { scan-assembler "vaddva.s8" } } */ +/* +**foo1: +** ... +** vaddva.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int8x16_t b) { return vaddvaq (a, b); } -/* { dg-final { scan-assembler "vaddva.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c index c943fa5789f..b3583ce5725 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddva.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, uint16x8_t b) { return vaddvaq_u16 (a, b); } -/* { dg-final { scan-assembler "vaddva.u16" } } */ +/* +**foo1: +** ... +** vaddva.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, uint16x8_t b) { return vaddvaq (a, b); } -/* { dg-final { scan-assembler "vaddva.u16" } } */ +/* +**foo2: +** ... +** vaddva.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint32_t +foo2 (uint16x8_t b) +{ + return vaddvaq (1, b); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c index 0950ff50d0f..006c0a3734f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddva.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, uint32x4_t b) { return vaddvaq_u32 (a, b); } -/* { dg-final { scan-assembler "vaddva.u32" } } */ +/* +**foo1: +** ... +** vaddva.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, uint32x4_t b) { return vaddvaq (a, b); } -/* { dg-final { scan-assembler "vaddva.u32" } } */ +/* +**foo2: +** ... +** vaddva.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint32_t +foo2 (uint32x4_t b) +{ + return vaddvaq (1, b); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c index 2a58225fbe3..cfe29bfd7be 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddva.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, uint8x16_t b) { return vaddvaq_u8 (a, b); } -/* { dg-final { scan-assembler "vaddva.u8" } } */ +/* +**foo1: +** ... +** vaddva.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, uint8x16_t b) { return vaddvaq (a, b); } -/* { dg-final { scan-assembler "vaddva.u8" } } */ +/* +**foo2: +** ... +** vaddva.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint32_t +foo2 (uint8x16_t b) +{ + return vaddvaq (1, b); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c index a786b8974b7..3d19b46fdc6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int16x8_t a, mve_pred16_t p) { return vaddvq_p_s16 (a, p); } -/* { dg-final { scan-assembler "vaddvt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int16x8_t a, mve_pred16_t p) { return vaddvq_p (a, p); } -/* { dg-final { scan-assembler "vaddvt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c index c688782180f..a148d15ead1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32x4_t a, mve_pred16_t p) { return vaddvq_p_s32 (a, p); } -/* { dg-final { scan-assembler "vaddvt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32x4_t a, mve_pred16_t p) { return vaddvq_p (a, p); } -/* { dg-final { scan-assembler "vaddvt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c index 8438448f86c..f0b0c499d0d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int8x16_t a, mve_pred16_t p) { return vaddvq_p_s8 (a, p); } -/* { dg-final { scan-assembler "vaddvt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int8x16_t a, mve_pred16_t p) { return vaddvq_p (a, p); } -/* { dg-final { scan-assembler "vaddvt.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c index ec7a5fa5a7f..2fb316c50ab 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint16x8_t a, mve_pred16_t p) { return vaddvq_p_u16 (a, p); } -/* { dg-final { scan-assembler "vaddvt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint16x8_t a, mve_pred16_t p) { return vaddvq_p (a, p); } -/* { dg-final { scan-assembler "vaddvt.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c index b70968880ce..24bde90ec77 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32x4_t a, mve_pred16_t p) { return vaddvq_p_u32 (a, p); } -/* { dg-final { scan-assembler "vaddvt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32x4_t a, mve_pred16_t p) { return vaddvq_p (a, p); } -/* { dg-final { scan-assembler "vaddvt.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c index 69381b78cc4..f6710941119 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint8x16_t a, mve_pred16_t p) { return vaddvq_p_u8 (a, p); } -/* { dg-final { scan-assembler "vaddvt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vaddvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint8x16_t a, mve_pred16_t p) { return vaddvq_p (a, p); } -/* { dg-final { scan-assembler "vaddvt.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c index b4fc11f4aa4..6b9a99f2b07 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c @@ -1,21 +1,33 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int16x8_t a) { return vaddvq_s16 (a); } -/* { dg-final { scan-assembler "vaddv.s16" } } */ +/* +**foo1: +** ... +** vaddv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int16x8_t a) { - return vaddvq_s16 (a); + return vaddvq (a); } -/* { dg-final { scan-assembler "vaddv.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c index 438b46ec246..50823b65ecc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c @@ -1,21 +1,33 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32x4_t a) { return vaddvq_s32 (a); } -/* { dg-final { scan-assembler "vaddv.s32" } } */ +/* +**foo1: +** ... +** vaddv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32x4_t a) { - return vaddvq_s32 (a); + return vaddvq (a); } -/* { dg-final { scan-assembler "vaddv.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c index b60b1f2da98..131edbe2b3f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c @@ -1,21 +1,33 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int8x16_t a) { return vaddvq_s8 (a); } -/* { dg-final { scan-assembler "vaddv.s8" } } */ +/* +**foo1: +** ... +** vaddv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int8x16_t a) { return vaddvq (a); } -/* { dg-final { scan-assembler "vaddv.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c index de782127faf..7c0ac0e1395 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint16x8_t a) { - return vaddvq_u16 (a); + return vaddvq_u16 (a); } -/* { dg-final { scan-assembler "vaddv.u16" } } */ +/* +**foo1: +** ... +** vaddv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint16x8_t a) { - return vaddvq (a); + return vaddvq (a); } -/* { dg-final { scan-assembler "vaddv.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c index c4672e42288..40779ed0f99 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32x4_t a) { - return vaddvq_u32 (a); + return vaddvq_u32 (a); } -/* { dg-final { scan-assembler "vaddv.u32" } } */ +/* +**foo1: +** ... +** vaddv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32x4_t a) { - return vaddvq (a); + return vaddvq (a); } -/* { dg-final { scan-assembler "vaddv.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c index e4e149cfb61..d2a6ba8f0fb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vaddv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint8x16_t a) { - return vaddvq_u8 (a); + return vaddvq_u8 (a); } -/* { dg-final { scan-assembler "vaddv.u8" } } */ +/* +**foo1: +** ... +** vaddv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint8x16_t a) { - return vaddvq (a); + return vaddvq (a); } -/* { dg-final { scan-assembler "vaddv.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file