From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2092) id BEDAF384F896; Mon, 28 Nov 2022 09:12:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BEDAF384F896 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669626776; bh=94kanvRjOIG6bJ6rXpg/gZWfAdikFNcPm1uLR102x+4=; h=From:To:Subject:Date:From; b=PmmdOiiw4kDT14Bt4+6zSXXSD9o1KZWtP3jLBKv3s5VGYotQKbkkW6ksEMCw20dI+ CXBIFxiqVCAmwh33EIYT0BxOvZiH0xzvuu8KM8g9jT1Eh7tRKamo+ATaN/3vgiLVMz K14ePYBUhbHvluAgLcy3eRxKFriLlpCqTO3PJBWY= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Andrea Corallo To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-4342] arm: improve tests and fix vmlaldavaxq* X-Act-Checkin: gcc X-Git-Author: Andrea Corallo X-Git-Refname: refs/heads/trunk X-Git-Oldrev: 69405ebb53323f5c32062b75ab7af304e7eb6656 X-Git-Newrev: 5a21c1451fc68c8d97e19aac62ed53fa0b803242 Message-Id: <20221128091256.BEDAF384F896@sourceware.org> Date: Mon, 28 Nov 2022 09:12:56 +0000 (GMT) List-Id: https://gcc.gnu.org/g:5a21c1451fc68c8d97e19aac62ed53fa0b803242 commit r13-4342-g5a21c1451fc68c8d97e19aac62ed53fa0b803242 Author: Andrea Corallo Date: Wed Nov 16 14:35:24 2022 +0100 arm: improve tests and fix vmlaldavaxq* gcc/ChangeLog: * config/arm/mve.md (mve_vmlaldavaq_) (mve_vmlaldavaxq_s, mve_vmlaldavaxq_p_): Fix spacing vs tabs. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Improve tests. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise. Diff: --- gcc/config/arm/mve.md | 6 ++-- .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 32 ++++++++++++++++++---- .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 32 ++++++++++++++++++---- .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 24 ++++++++++++---- .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 24 ++++++++++++---- 5 files changed, 91 insertions(+), 27 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 714dc6fc7ce..d2ffae6a425 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -4163,7 +4163,7 @@ VMLALDAVAQ)) ] "TARGET_HAVE_MVE" - "vmlaldava.%# %Q0, %R0, %q2, %q3" + "vmlaldava.%#\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -4179,7 +4179,7 @@ VMLALDAVAXQ_S)) ] "TARGET_HAVE_MVE" - "vmlaldavax.s%# %Q0, %R0, %q2, %q3" + "vmlaldavax.s%#\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) @@ -6126,7 +6126,7 @@ VMLALDAVAXQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vmlaldavaxt.%# %Q0, %R0, %q2, %q3" + "vpst\;vmlaldavaxt.%#\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c index f33d3880236..87f0354a636 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmlaldavaxq_p_s16 (a, b, c, p); + return vmlaldavaxq_p_s16 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmlaldavaxq_p (a, b, c, p); + return vmlaldavaxq_p (add, m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c index ab072a9850e..d26bf5b90af 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmlaldavaxq_p_s32 (a, b, c, p); + return vmlaldavaxq_p_s32 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmlaldavaxq_p (a, b, c, p); + return vmlaldavaxq_p (add, m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c index e68fbd2df94..3a37e7a58a9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int64_t a, int16x8_t b, int16x8_t c) +foo (int64_t add, int16x8_t m1, int16x8_t m2) { - return vmlaldavaxq_s16 (a, b, c); + return vmlaldavaxq_s16 (add, m1, m2); } -/* { dg-final { scan-assembler "vmlaldavax.s16" } } */ +/* +**foo1: +** ... +** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int64_t a, int16x8_t b, int16x8_t c) +foo1 (int64_t add, int16x8_t m1, int16x8_t m2) { - return vmlaldavaxq (a, b, c); + return vmlaldavaxq (add, m1, m2); } -/* { dg-final { scan-assembler "vmlaldavax.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c index 7b6fea289da..155b8be70f0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int64_t a, int32x4_t b, int32x4_t c) +foo (int64_t add, int32x4_t m1, int32x4_t m2) { - return vmlaldavaxq_s32 (a, b, c); + return vmlaldavaxq_s32 (add, m1, m2); } -/* { dg-final { scan-assembler "vmlaldavax.s32" } } */ +/* +**foo1: +** ... +** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int64_t a, int32x4_t b, int32x4_t c) +foo1 (int64_t add, int32x4_t m1, int32x4_t m2) { - return vmlaldavaxq (a, b, c); + return vmlaldavaxq (add, m1, m2); } -/* { dg-final { scan-assembler "vmlaldavax.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file