From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2092) id 01F58384EF60; Mon, 28 Nov 2022 09:13:07 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 01F58384EF60 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669626787; bh=RKD6XF+sRn8NQK0149vXOmOw33GeX5m+J7iN+RCC0B8=; h=From:To:Subject:Date:From; b=HcQJz7Cj9aaY6vfJVmcunQpMebQXxWrd0eoicb9QPcd3F5nJjGrsnJ9ManFiUM5Ti fUdKOhWAxP5xrwPVZNGlq7/Ryyh9LYIWN7ww/Sw1UsPPa1Xp0KXgvMogIn9Cad5V9X HxDWAMKeG72nCwQ8ViXzikESaD+j1P82uLdnopO0= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Andrea Corallo To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-4344] arm: improve tests for vqaddq_m* X-Act-Checkin: gcc X-Git-Author: Andrea Corallo X-Git-Refname: refs/heads/trunk X-Git-Oldrev: 4e73978c92be03d54f81d047ad79102c0efcbc5b X-Git-Newrev: 7e8cf19eee2ec215ff6b714cbf4e6e150e6eb04a Message-Id: <20221128091307.01F58384EF60@sourceware.org> Date: Mon, 28 Nov 2022 09:13:07 +0000 (GMT) List-Id: https://gcc.gnu.org/g:7e8cf19eee2ec215ff6b714cbf4e6e150e6eb04a commit r13-4344-g7e8cf19eee2ec215ff6b714cbf4e6e150e6eb04a Author: Andrea Corallo Date: Wed Nov 16 14:39:25 2022 +0100 arm: improve tests for vqaddq_m* gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Improve test. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise. Diff: --- .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c | 42 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c | 26 +++++++++++--- .../gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c | 28 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_s16.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_s32.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_s8.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_u16.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_u32.c | 16 +++++++-- .../gcc.target/arm/mve/intrinsics/vqaddq_u8.c | 16 +++++++-- 24 files changed, 516 insertions(+), 72 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c index 65d3f770fe2..a659373d441 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vqaddq_m_n_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c index 4499a0eaa41..8ffc6a67762 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vqaddq_m_n_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c index d3e1d555cb1..2e88b7fabac 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) { return vqaddq_m_n_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c index baadfe72e8d..61cf9fcf2aa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) { return vqaddq_m_n_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u16" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) +{ + return vqaddq_m (inactive, a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c index 80808777d9a..bbd255ac1f1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) { return vqaddq_m_n_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u32" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) +{ + return vqaddq_m (inactive, a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c index 32f2894422d..9cee8c65333 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c @@ -1,23 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) { return vqaddq_m_n_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u8" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) +{ + return vqaddq_m (inactive, a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c index d5b7fa63f6a..8bb8a957423 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqaddq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c index 015bc3eb206..9959724fc11 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqaddq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c index b241fddd069..6b918978880 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqaddq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c index fa752355d64..c0a8d9ba9c8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vqaddq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c index 0729b6bb30f..7a72ce57840 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vqaddq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c index f1541658399..f7e6ca9b5a4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vqaddq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vqaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqaddt.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c index 5eeda2bc2dd..0fac7abeac0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16_t b) { return vqaddq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vqadd.s16" } } */ +/* +**foo1: +** ... +** vqadd.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c index 5b914d18b98..d750b1f2c14 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b) { return vqaddq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vqadd.s32" } } */ +/* +**foo1: +** ... +** vqadd.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c index 06f22c2b8df..5fc796edf75 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8_t b) { return vqaddq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vqadd.s8" } } */ +/* +**foo1: +** ... +** vqadd.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c index 5403f0b6646..decad65c188 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16_t b) { return vqaddq_n_u16 (a, b); } -/* { dg-final { scan-assembler "vqadd.u16" } } */ +/* +**foo1: +** ... +** vqadd.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.u16" } } */ +/* +**foo2: +** ... +** vqadd.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t a) +{ + return vqaddq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c index 77185808a16..b0a6d79093e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32_t b) { return vqaddq_n_u32 (a, b); } -/* { dg-final { scan-assembler "vqadd.u32" } } */ +/* +**foo1: +** ... +** vqadd.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.u32" } } */ +/* +**foo2: +** ... +** vqadd.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t a) +{ + return vqaddq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c index f0fa9bf3f5d..f9ca9a1f042 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8_t b) { return vqaddq_n_u8 (a, b); } -/* { dg-final { scan-assembler "vqadd.u8" } } */ +/* +**foo1: +** ... +** vqadd.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.u8" } } */ +/* +**foo2: +** ... +** vqadd.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t a) +{ + return vqaddq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c index 83cd3475a6f..ffa31463372 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vqaddq_s16 (a, b); } -/* { dg-final { scan-assembler "vqadd.s16" } } */ +/* +**foo1: +** ... +** vqadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c index d26dd206912..c5937a967ff 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vqaddq_s32 (a, b); } -/* { dg-final { scan-assembler "vqadd.s32" } } */ +/* +**foo1: +** ... +** vqadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c index de03264b4cc..9f937512811 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vqaddq_s8 (a, b); } -/* { dg-final { scan-assembler "vqadd.s8" } } */ +/* +**foo1: +** ... +** vqadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c index cd4efc1dd7c..aa4be43f244 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vqaddq_u16 (a, b); } -/* { dg-final { scan-assembler "vqadd.u16" } } */ +/* +**foo1: +** ... +** vqadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c index 8b3afb4bd04..daef60eb5ca 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vqaddq_u32 (a, b); } -/* { dg-final { scan-assembler "vqadd.u32" } } */ +/* +**foo1: +** ... +** vqadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c index da2ff1bb25c..e28807ec708 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vqaddq_u8 (a, b); } -/* { dg-final { scan-assembler "vqadd.u8" } } */ +/* +**foo1: +** ... +** vqadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vqaddq (a, b); } -/* { dg-final { scan-assembler "vqadd.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file