From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2092) id ADC9C385514B; Mon, 28 Nov 2022 09:13:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org ADC9C385514B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669626817; bh=LEs71rLi12RS0VUhUX1q6tVGFHcztavUI+fppPR/Zr4=; h=From:To:Subject:Date:From; b=JjslYvAzKXTMN+6B8wmE98Y/c0goGlcsFnyI2+5qP1hm6YafZQ5qMS+n0pS8KK8DP ggmcbfQnLYNu5xvTosGd9vhGaGcUKegePnJ2Ct3CzyTyUKjswl/K2mGphgcEcZMsqN Ru7YE7cGj1h2te/EROnrgj8SA8z7CITKQA3rEPx0= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Andrea Corallo To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-4350] arm: improve tests and fix vrmlaldavhaq* X-Act-Checkin: gcc X-Git-Author: Andrea Corallo X-Git-Refname: refs/heads/trunk X-Git-Oldrev: 329ccff3be53bfad4bb6aace2c77382099271a4a X-Git-Newrev: a59b9af355d69db7fa656c7a3bb6dd8e0d29f98b Message-Id: <20221128091337.ADC9C385514B@sourceware.org> Date: Mon, 28 Nov 2022 09:13:37 +0000 (GMT) List-Id: https://gcc.gnu.org/g:a59b9af355d69db7fa656c7a3bb6dd8e0d29f98b commit r13-4350-ga59b9af355d69db7fa656c7a3bb6dd8e0d29f98b Author: Andrea Corallo Date: Wed Nov 16 14:44:57 2022 +0100 arm: improve tests and fix vrmlaldavhaq* gcc/ChangeLog: * config/arm/mve.md (mve_vrmlaldavhq_v4si, mve_vrmlaldavhaq_v4si): Fix spacing vs tabs. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Improve test. * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise. Diff: --- gcc/config/arm/mve.md | 4 +-- .../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 24 +++++++++++-- .../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 40 ++++++++++++++++++++-- 3 files changed, 62 insertions(+), 6 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index d2ffae6a425..b5e6da4b133 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -2543,7 +2543,7 @@ VRMLALDAVHQ)) ] "TARGET_HAVE_MVE" - "vrmlaldavh.32 %Q0, %R0, %q1, %q2" + "vrmlaldavh.32\t%Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2649,7 +2649,7 @@ VRMLALDAVHAQ)) ] "TARGET_HAVE_MVE" - "vrmlaldavha.32 %Q0, %R0, %q2, %q3" + "vrmlaldavha.32\t%Q0, %R0, %q2, %q3" [(set_attr "type" "mve_move") ]) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c index 263d3509771..dec4a969dfe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavhat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vrmlaldavhaq_p_s32 (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlaldavhat.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavhat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vrmlaldavhaq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlaldavhat.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c index 83ab68c001b..f3c8bfd121c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c @@ -1,21 +1,57 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavhat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) { return vrmlaldavhaq_p_u32 (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlaldavhat.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavhat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) { return vrmlaldavhaq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlaldavhat.u32" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavhat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +uint64_t +foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p) +{ + return vrmlaldavhaq_p (1, b, c, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file