From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2140) id 5D1D43858289; Thu, 1 Dec 2022 07:40:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5D1D43858289 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669880408; bh=R1l/C/0agSz7SkpEupqfXk4UqFfSX7nx0MFHeu3DzFQ=; h=From:To:Subject:Date:From; b=ddqtSdrn6dzipYtH5wY/FE2EG3nzR/Hf1pZkhBzxuu22NgRvarzRtb6UpGGWlmjMT SKN6rjAmCANvoiaZ2yNN9zkWG9VBn4TfXQmSWxdP4E4nnWOQScDl/pcPDNg5l06izz EFsmemcVmYBfMCiEt23YwJfw/EHbPX8h8GUBCmiM= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Alexandre Oliva To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/aoliva/heads/testme)] [PR40457] [arm] expand SI-aligned movdi into pair of movsi X-Act-Checkin: gcc X-Git-Author: Alexandre Oliva X-Git-Refname: refs/users/aoliva/heads/testme X-Git-Oldrev: 91062e3e38f5b61998d30a51ea8404626b9482e6 X-Git-Newrev: cec475ae63c3659241dbd5c474990b5103148f86 Message-Id: <20221201074008.5D1D43858289@sourceware.org> Date: Thu, 1 Dec 2022 07:40:08 +0000 (GMT) List-Id: https://gcc.gnu.org/g:cec475ae63c3659241dbd5c474990b5103148f86 commit cec475ae63c3659241dbd5c474990b5103148f86 Author: Alexandre Oliva Date: Thu Dec 1 04:38:48 2022 -0300 [PR40457] [arm] expand SI-aligned movdi into pair of movsi When expanding a misaligned DImode move, emit aligned SImode moves if the parts are sufficiently aligned. This enables neighboring stores to be peephole-combined into stm, as expected by the PR40457 testcase, even after SLP vectorizes the originally aligned SImode stores into a misaligned DImode store. for gcc/ChangeLog PR target/40457 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode moves. Change-Id: Ib91440e12e6ff424e3e7359874bf38c2779887a0 TN: VB12-014 Diff: --- gcc/config/arm/arm.md | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 69bf343fb0e..a9eb0299aa7 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -12783,8 +12783,16 @@ rtx hi_op0 = gen_highpart_mode (SImode, DImode, operands[0]); rtx hi_op1 = gen_highpart_mode (SImode, DImode, operands[1]); - emit_insn (gen_movmisalignsi (lo_op0, lo_op1)); - emit_insn (gen_movmisalignsi (hi_op0, hi_op1)); + if (aligned_operand (lo_op0, SImode) && aligned_operand (lo_op1, SImode)) + { + emit_move_insn (lo_op0, lo_op1); + emit_move_insn (hi_op0, hi_op1); + } + else + { + emit_insn (gen_movmisalignsi (lo_op0, lo_op1)); + emit_insn (gen_movmisalignsi (hi_op0, hi_op1)); + } DONE; })