[gcc r13-4465] Improve ix86_expand_fast_convert_bf_to_sf with new extendbfsf2_1.

[gcc r13-4465] Improve ix86_expand_fast_convert_bf_to_sf with new extendbfsf2_1.

[hongtao Liu]

https://gcc.gnu.org/g:e55251f3d3598ca6e001c4afa51b2ec913b4cac1

commit r13-4465-ge55251f3d3598ca6e001c4afa51b2ec913b4cac1
Author: liuhongt <hongtao.liu@intel.com>
Date:   Fri Dec 2 09:54:06 2022 +0800

    Improve ix86_expand_fast_convert_bf_to_sf with new extendbfsf2_1.
    
    After supporting extendbfsf2_1, ix86_expand_fast_convert_bf_to_sf can
    be improved with pslld either.
    CONST_INT_P is not handled since constant shift can be optimized off.
    
    gcc/ChangeLog:
    
            * config/i386/i386-expand.cc
            (ix86_expand_fast_convert_bf_to_sf): Use extendbfsf2_1 for
            nonimmediate operand.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/i386/cbranchbf4.c: New test.

Diff:
---
 gcc/config/i386/i386-expand.cc             | 13 ++++++-------
 gcc/testsuite/gcc.target/i386/cbranchbf4.c | 15 +++++++++++++++
 2 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 04aadda6b07..b920cfbaf90 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -24187,14 +24187,13 @@ ix86_expand_fast_convert_bf_to_sf (rtx val)
       /* FLOAT_EXTEND simplification will fail if VAL is a sNaN.  */
       ret = gen_reg_rtx (SImode);
       emit_move_insn (ret, GEN_INT (INTVAL (op) & 0xffff));
+      emit_insn (gen_ashlsi3 (ret, ret, GEN_INT (16)));
+      return gen_lowpart (SFmode, ret);
     }
-  else
-    {
-      ret = gen_reg_rtx (SImode);
-      emit_insn (gen_zero_extendhisi2 (ret, op));
-    }
-  emit_insn (gen_ashlsi3 (ret, ret, GEN_INT (16)));
-  return gen_lowpart (SFmode, ret);
+
+  ret = gen_reg_rtx (SFmode);
+  emit_insn (gen_extendbfsf2_1 (ret, force_reg (BFmode, val)));
+  return ret;
 }
 
 #include "gt-i386-expand.h"
diff --git a/gcc/testsuite/gcc.target/i386/cbranchbf4.c b/gcc/testsuite/gcc.target/i386/cbranchbf4.c
new file mode 100644
index 00000000000..8241a0c2165
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cbranchbf4.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-fexcess-precision=16 -O -msse2 -mfpmath=sse" } */
+/* { dg-final { scan-assembler-times "pslld" 4 } } */
+
+char
+foo (__bf16 a, __bf16 b)
+{
+  return a > b;
+}
+
+float
+foo1 (__bf16 a, __bf16 b, float c, float d)
+{
+  return a > b ? c : d;
+}