From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7808) id B841B3840139; Tue, 13 Dec 2022 08:54:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B841B3840139 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1670921663; bh=zcRduhkItBteKe+D+AMhG/bwwkDF+/i4cglWr2P+EEQ=; h=From:To:Subject:Date:From; b=oiLmTyY2vt9zQdwL+vB0tcg5mCOR8l/CvuoDuybLq4pO8l8Rvq7pqXIo3h7eO1I0R si6z3Cqf6Wip956ug7eEZxu+XzR1Wjv5h0IW4g0UFsE6meoxzkApKNqUPjNrvJKYza wy4+jldpuAm+AI5QaLKWU0K+rSXBf/ZqJkVc+UdY= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: HaoChen Gui To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-4628] rs6000: enable cbranchcc4 X-Act-Checkin: gcc X-Git-Author: Haochen Gui X-Git-Refname: refs/heads/master X-Git-Oldrev: 99cce60d0b8f3c3a77be8e1bb716f3e2fee37d46 X-Git-Newrev: 8ad0a7df8950cd07fb3b92b3da8007e5800a255a Message-Id: <20221213085423.B841B3840139@sourceware.org> Date: Tue, 13 Dec 2022 08:54:23 +0000 (GMT) List-Id: https://gcc.gnu.org/g:8ad0a7df8950cd07fb3b92b3da8007e5800a255a commit r13-4628-g8ad0a7df8950cd07fb3b92b3da8007e5800a255a Author: Haochen Gui Date: Tue Dec 13 16:45:10 2022 +0800 rs6000: enable cbranchcc4 This patch enables "have_cbranchcc4" on rs6000 by defining a "cbranchcc4" expander. "have_cbrnachcc4" is a flag in ifcvt.cc to indicate if branching by CC bits is valid or not. With this flag enabled, some branches can be optimized to conditional moves. 2022-12-07 Haochen Gui gcc/ * config/rs6000/rs6000.md (cbranchcc4): New expander. gcc/testsuite * gcc.target/powerpc/cbranchcc4-1.c: New. * gcc.target/powerpc/cbranchcc4-2.c: New. Diff: --- gcc/config/rs6000/rs6000.md | 10 ++++++++++ gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c | 15 +++++++++++++++ gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c | 11 +++++++++++ 3 files changed, 36 insertions(+) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 4bd1dfd3da9..6011f5bf76a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -11913,6 +11913,16 @@ DONE; }) +(define_expand "cbranchcc4" + [(set (pc) + (if_then_else (match_operator 0 "branch_comparison_operator" + [(match_operand 1 "cc_reg_operand") + (match_operand 2 "zero_constant")]) + (label_ref (match_operand 3)) + (pc)))] + "" + "") + (define_expand "cstore4_signed" [(use (match_operator 1 "signed_comparison_operator" [(match_operand:P 2 "gpc_reg_operand") diff --git a/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c new file mode 100644 index 00000000000..6c2cd130b6d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +/* Verify there is no ICE with cbranchcc4 enabled. */ + +int foo (double d) +{ + if (d == 0.0) + return 0; + + d = ((d) >= 0 ? (d) : -(d)); + + if (d < 1.0) + return 1; +} diff --git a/gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c new file mode 100644 index 00000000000..528ba1a878d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-rtl-ce1" } */ +/* { dg-final { scan-rtl-dump "noce_try_store_flag_constants" "ce1" } } */ + +/* The inner branch should be detected by ifcvt then be converted to a setcc + with a plus by noce_try_store_flag_constants. */ + +int test (unsigned int a, unsigned int b) +{ + return (a < b ? 0 : (a > b ? 2 : 1)); +}