From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id 080913858C60; Mon, 19 Dec 2022 14:24:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 080913858C60 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1671459878; bh=TyVa5utvJEYHB2lE9EawqIx6ALu1ncVp5Kj2dq+Nt5I=; h=From:To:Subject:Date:From; b=DOexm1xMWwtKmOfxlh8rXDZdCMRMKo03GjGTMZav86mXAmQfsr08hWclYNY5NzW4D 1ne7sH/b4musowuTgDR5G2sKYMIAMYi+WGnyPrN6we0JCb6ilLwny3/Hvv+PveCQS3 fhvPv3ge8Z59NqwNz4vuYqpByYu0T1P8qFIOjpMs= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-4791] RISC-V: Add testcases for VSETVL PASS 5 X-Act-Checkin: gcc X-Git-Author: Ju-Zhe Zhong X-Git-Refname: refs/heads/master X-Git-Oldrev: 5a1b66b77cfbf617494e1baad8cbf0fd2d1a0c54 X-Git-Newrev: 6c098f7d23db4dd98e7fed74a35416248397be40 Message-Id: <20221219142438.080913858C60@sourceware.org> Date: Mon, 19 Dec 2022 14:24:37 +0000 (GMT) List-Id: https://gcc.gnu.org/g:6c098f7d23db4dd98e7fed74a35416248397be40 commit r13-4791-g6c098f7d23db4dd98e7fed74a35416248397be40 Author: Ju-Zhe Zhong Date: Wed Dec 14 16:25:58 2022 +0800 RISC-V: Add testcases for VSETVL PASS 5 gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c: New test. Diff: --- .../riscv/rvv/vsetvl/vlmax_back_prop-1.c | 36 +++++ .../riscv/rvv/vsetvl/vlmax_back_prop-10.c | 59 ++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-11.c | 63 +++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-12.c | 64 +++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-13.c | 64 +++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-14.c | 58 ++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-15.c | 143 +++++++++++++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-16.c | 54 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-17.c | 59 ++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-18.c | 58 ++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-19.c | 48 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-2.c | 50 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-20.c | 59 ++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-21.c | 50 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-22.c | 58 ++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-23.c | 41 ++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-24.c | 41 ++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-25.c | 96 +++++++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-26.c | 89 ++++++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-27.c | 51 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-28.c | 54 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-29.c | 54 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-3.c | 47 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-30.c | 44 ++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-31.c | 46 ++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-32.c | 46 ++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-33.c | 45 ++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-34.c | 45 ++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-35.c | 38 +++++ .../riscv/rvv/vsetvl/vlmax_back_prop-36.c | 47 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-37.c | 41 ++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-38.c | 73 ++++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-39.c | 20 +++ .../riscv/rvv/vsetvl/vlmax_back_prop-4.c | 104 ++++++++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-40.c | 22 +++ .../riscv/rvv/vsetvl/vlmax_back_prop-41.c | 26 ++++ .../riscv/rvv/vsetvl/vlmax_back_prop-42.c | 26 ++++ .../riscv/rvv/vsetvl/vlmax_back_prop-43.c | 27 ++++ .../riscv/rvv/vsetvl/vlmax_back_prop-44.c | 28 ++++ .../riscv/rvv/vsetvl/vlmax_back_prop-45.c | 34 +++++ .../riscv/rvv/vsetvl/vlmax_back_prop-46.c | 32 +++++ .../riscv/rvv/vsetvl/vlmax_back_prop-5.c | 48 +++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-6.c | 155 +++++++++++++++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-7.c | 43 ++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-8.c | 149 ++++++++++++++++++++ .../riscv/rvv/vsetvl/vlmax_back_prop-9.c | 44 ++++++ 46 files changed, 2579 insertions(+) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c new file mode 100644 index 00000000000..fbf451f3d4c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c @@ -0,0 +1,36 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c new file mode 100644 index 00000000000..ba289f24d23 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c @@ -0,0 +1,59 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) + { + if (cond2 == 11) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + else if (cond2 == 111) + { + if (cond3 == 300) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c new file mode 100644 index 00000000000..44e8a3f12f7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c @@ -0,0 +1,63 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300 + i); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) + { + if (cond2 == 11) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + else if (cond2 == 111) + { + if (cond3 == 300) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } else { + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 2000 + i); + *(vfloat32mf2_t*)(out + i + 4000) = v; + } + } + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c new file mode 100644 index 00000000000..a8f5af9f1fa --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c @@ -0,0 +1,64 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300 + i); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) + { + if (cond2 == 11) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + else if (cond2 == 111) + { + if (cond3 == 300) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } else { + for (int i = 0; i < n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 2000 + i); + *(vint8mf2_t*)(out + i + 4000) = v; + } + } + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c new file mode 100644 index 00000000000..31034bcfa25 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c @@ -0,0 +1,64 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300 + i); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) + { + if (cond2 == 11) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + else if (cond2 == 111) + { + if (cond3 == 300) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } else { + for (int i = 0; i < n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 2000 + i); + *(vint8mf2_t*)(out + i + 4000) = v; + } + } + } + } + + for (int i = 0; i < n; i++) { + vint16m1_t v; + *(vint16m1_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c new file mode 100644 index 00000000000..dececb45294 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c new file mode 100644 index 00000000000..161d14c2009 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c @@ -0,0 +1,143 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c new file mode 100644 index 00000000000..84abe55a2b0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c @@ -0,0 +1,54 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 771); + *(vint8mf8_t*)(out + 771) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71); + *(vint32mf2_t*)(out + 71) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17); + *(vfloat32mf2_t*)(out + 17) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117); + *(vuint32mf2_t*)(out + 117) = v4; + } else { + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123); + *(vfloat32mf2_t*)(out + 1123) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + 333) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91); + *(vbool64_t*)(out + 91) = v2; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c new file mode 100644 index 00000000000..1f3bae2342a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c @@ -0,0 +1,59 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } else { + for (int i = 0; i < n; i++){ + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123 + i); + *(vfloat32mf2_t*)(out + 1123 + i) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333 + i); + *(vint8mf8_t*)(out + 333 + i) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91 + i); + *(vbool64_t*)(out + 91 + i) = v2; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c new file mode 100644 index 00000000000..33885e77ae9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } else { + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123); + *(vfloat32mf2_t*)(out + 1123) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + 333) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91); + *(vbool64_t*)(out + 91) = v2; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c new file mode 100644 index 00000000000..213c48a1b55 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 771); + *(vint8mf8_t*)(out + 771) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71); + *(vint32mf2_t*)(out + 71) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17); + *(vfloat32mf2_t*)(out + 17) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117); + *(vuint32mf2_t*)(out + 117) = v4; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c new file mode 100644 index 00000000000..b8c2cc05f38 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c @@ -0,0 +1,50 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + out[i]; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] * 2; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] * out[i]; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] * out[i] + 100; + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c new file mode 100644 index 00000000000..1f3bae2342a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c @@ -0,0 +1,59 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } else { + for (int i = 0; i < n; i++){ + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123 + i); + *(vfloat32mf2_t*)(out + 1123 + i) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333 + i); + *(vint8mf8_t*)(out + 333 + i) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91 + i); + *(vbool64_t*)(out + 91 + i) = v2; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c new file mode 100644 index 00000000000..b60a6527262 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c @@ -0,0 +1,50 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c new file mode 100644 index 00000000000..c4a04511f34 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } else { + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123); + *(vfloat32mf2_t*)(out + 1123) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + 333) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91); + *(vbool64_t*)(out + 91) = v2; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c new file mode 100644 index 00000000000..36a18a40536 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + vint32mf2_t v; + *(vint32mf2_t*)(out + 7000) = v; + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c new file mode 100644 index 00000000000..b4d4240b8d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + vint32mf2_t v; + *(vint32mf2_t*)(out + 7000) = v; + + for (int i = 0; i < n; i++) { + vbool64_t v; + *(vbool64_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c new file mode 100644 index 00000000000..4295ac3a2bb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c @@ -0,0 +1,96 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else if (cond == 1) { + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 200) = v; + for (int i = 0; i < n; i++) + { + vint32mf2_t v2; + *(vint32mf2_t*)(out + i + 200) = v2; + } + } else if (cond == 2) { + vint8mf8_t v = *(vint8mf8_t*)(in + 300); + *(vint8mf8_t*)(out + 300) = v; + for (int i = 0; i < n; i++) + { + vint8mf8_t v2; + *(vint8mf8_t*)(out + i + 300) = v2; + } + } else if (cond == 3) { + vint8mf8_t v = *(vint8mf8_t*)(in + 400); + *(vint8mf8_t*)(out + 400) = v; + for (int i = 0; i < n; i++) + { + vint64m1_t v2; + *(vint64m1_t*)(out + i + 400) = v2; + } + } else if (cond == 4) { + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 500) = v2; + } + } else if (cond == 5) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 600); + *(vuint8mf8_t*)(out + 600) = v; + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2; + *(vuint16mf4_t*)(out + i + 600) = v2; + } + } else if (cond == 6) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 700); + *(vuint8mf8_t*)(out + 700) = v; + for (int i = 0; i < n; i++) + { + vuint32mf2_t v2; + *(vuint32mf2_t*)(out + i + 700) = v2; + } + } else if (cond == 7) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 800); + *(vuint8mf8_t*)(out + 800) = v; + for (int i = 0; i < n; i++) + { + vuint8mf8_t v2; + *(vuint8mf8_t*)(out + i + 800) = v2; + } + } else if (cond == 8) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900); + *(vuint8mf8_t*)(out + 900) = v; + for (int i = 0; i < n; i++) + { + vuint64m1_t v2; + *(vuint64m1_t*)(out + i + 900) = v2; + } + } else { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 1000); + *(vuint8mf8_t*)(out + 1000) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 1000) = v2; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 10 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 20 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c new file mode 100644 index 00000000000..59e069f2149 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c @@ -0,0 +1,89 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else if (cond == 1) { + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 200) = v; + for (int i = 0; i < n; i++) + { + vint32mf2_t v2; + *(vint32mf2_t*)(out + i + 200) = v2; + } + } else if (cond == 2) { + vint8mf8_t v = *(vint8mf8_t*)(in + 300); + *(vint8mf8_t*)(out + 300) = v; + for (int i = 0; i < n; i++) + { + vint8mf8_t v2; + *(vint8mf8_t*)(out + i + 300) = v2; + } + } else if (cond == 3) { + vint8mf8_t v = *(vint8mf8_t*)(in + 400); + *(vint8mf8_t*)(out + 400) = v; + for (int i = 0; i < n; i++) + { + vint64m1_t v2; + *(vint64m1_t*)(out + i + 400) = v2; + } + } else if (cond == 4) { + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 500) = v2; + } + } else if (cond == 5) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 600); + *(vuint8mf8_t*)(out + 600) = v; + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2; + *(vuint16mf4_t*)(out + i + 600) = v2; + } + } else if (cond == 6) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 700); + *(vuint8mf8_t*)(out + 700) = v; + for (int i = 0; i < n; i++) + { + vuint32mf2_t v2; + *(vuint32mf2_t*)(out + i + 700) = v2; + } + } else if (cond == 7) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 800); + *(vuint8mf8_t*)(out + 800) = v; + for (int i = 0; i < n; i++) + { + vuint8mf8_t v2; + *(vuint8mf8_t*)(out + i + 800) = v2; + } + } else if (cond == 8) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900); + *(vuint8mf8_t*)(out + 900) = v; + for (int i = 0; i < n; i++) + { + vuint64m1_t v2; + *(vuint64m1_t*)(out + i + 900) = v2; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 8 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 17 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c new file mode 100644 index 00000000000..e148a1cc859 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 1000); + *(vuint8mf8_t*)(out + 1000) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 1000) = v2; + vbool64_t v3; + *(vbool64_t*)(out + i + 2000) = v3; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c new file mode 100644 index 00000000000..e8340a63ee2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c @@ -0,0 +1,54 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 1000); + *(vuint8mf8_t*)(out + 1000) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 1000) = v2; + vbool64_t v3; + *(vbool64_t*)(out + i + 2000) = v3; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10; + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 10 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c new file mode 100644 index 00000000000..74584e7708b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c @@ -0,0 +1,54 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else { + vuint8mf8_t v; + *(vuint8mf8_t*)(out + 1000) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 1000) = v2; + vbool64_t v3; + *(vbool64_t*)(out + i + 2000) = v3; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10; + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 11 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c new file mode 100644 index 00000000000..63f6c72c60e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + } else { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 3; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c new file mode 100644 index 00000000000..92bf3abaec7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2 = *(vfloat32mf2_t*)(in + i + 1000); + *(vfloat32mf2_t*)(out + i + 1000) = v2; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10 = *(vuint32mf2_t*)(in + i + 100000); + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c new file mode 100644 index 00000000000..4d254570e4d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c @@ -0,0 +1,46 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2 = *(vuint16mf4_t*)(in + i + 1000); + *(vuint16mf4_t*)(out + i + 1000) = v2; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10 = *(vuint32mf2_t*)(in + i + 100000); + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c new file mode 100644 index 00000000000..284df7245e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c @@ -0,0 +1,46 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2 = *(vuint16mf4_t*)(in + i + 1000); + *(vuint16mf4_t*)(out + i + 1000) = v2; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10; + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + + for (int i = 0; i < n; i++) + { + vint8mf8_t v1 = *(vint8mf8_t*)(in + i + 100000); + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]:+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 8 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c new file mode 100644 index 00000000000..1057b1bc00b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2; + *(vuint16mf4_t*)(out + i + 1000) = v2; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10; + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + + for (int i = 0; i < n; i++) + { + vint8mf8_t v1 = *(vint8mf8_t*)(in + i + 100000); + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 8 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c new file mode 100644 index 00000000000..9746ebed18c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond) +{ + if (cond == 0) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + } + else if (cond == 1) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + for (int i = 0; i < n; i++) + { + out[i] = out2[i] / in[i]; + } + for (int i = 0; i < n; i++) + { + out2[i] = out[i] * in[i]; + } + } + else + { + for (int i = 0; i < n; i++) + { + out[i] = in[i] + 4; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c new file mode 100644 index 00000000000..0547d622838 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond) +{ + if (cond == 0) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + } + else if (cond == 1) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + for (int i = 0; i < n; i++) + { + out[i] = out2[i] / in[i]; + } + for (int i = 0; i < n; i++) + { + out2[i] = out[i] * in[i]; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c new file mode 100644 index 00000000000..a82b86f4d88 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond) +{ + if (cond == 0) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + } + else if (cond == 1) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + for (int i = 0; i < n; i++) + { + out[i] = out2[i] / in[i]; + } + for (int i = 0; i < n; i++) + { + out2[i] = out[i] * in[i]; + } + } + else + { + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)in2; + *(vint32mf2_t*)(out + i + 10) = v1; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]+:} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c new file mode 100644 index 00000000000..981e90ed6af --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void fn3 (void); + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond) +{ + if (cond == 0) + { + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1000); + *(vfloat32mf2_t*)(out + i + 1000) = v1; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)in; + *(vint32mf2_t*)(out + i + 10) = v1; + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v1 = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + i + 100) = v1; + } + } + else + { + fn3 (); + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c new file mode 100644 index 00000000000..79dbeefb585 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c @@ -0,0 +1,73 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond, int cond2) +{ + if (cond == 0) + { + if (cond2) { + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1000); + *(vfloat32mf2_t*)(out + i + 1000) = v1; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)in; + *(vint32mf2_t*)(out + i + 10) = v1; + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v1 = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + i + 100) = v1; + } + } else { + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 2000); + *(vfloat32mf2_t*)(out + i + 2000) = v1; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 200) = v1; + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v1 = *(vint16mf4_t*)(in + 300); + *(vint16mf4_t*)(out + i + 300) = v1; + } + } + } + else + { + for (int i = 0; i < n; i++) + { + vint16mf4_t v1 = *(vint16mf4_t*)(in + 30000); + *(vint16mf4_t*)(out + i + 30000) = v1; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)(in + 40000); + *(vint32mf2_t*)(out + i + 40000) = v1; + } + for (int i = 0; i < n; i++) + { + vuint32mf2_t v1 = *(vuint32mf2_t*)(in + 50000); + *(vuint32mf2_t*)(out + i + 50000) = v1; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c new file mode 100644 index 00000000000..c3eb6f9f6a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_3 (int32_t * restrict in, int32_t * restrict out, size_t n, int cond) +{ + vint8mf2_t v; + for (size_t i = 0; i < n; i++) + { + if (i % 2 == 0) { + v = *(vint8mf2_t*)(in + i); + } else { + *(vint8mf2_t*)(out + i) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c new file mode 100644 index 00000000000..0ba60047699 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c @@ -0,0 +1,104 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + out[i] = out[i] + 3; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 5; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 6; + } + } else if (cond == 4) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 8; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 9; + } + } else if (cond == 5) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 10; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 11; + } + } else if (cond == 6) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 12; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 13; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] * out[i]; + } + } else if (cond == 7) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 15; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 16; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + out[i]; + } + } else if (cond == 8) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 101; + } + } else if (cond == 9) { + for (int i = 0; i < n; i++) { + out[i] = out[i] * 101; + } + } else if (cond == 10) { + for (int i = 0; i < n; i++) { + out[i] = out[i] >> 3; + } + } else { + for (int i = 0; i < n; i++) { + out[i] = out[i] << 1; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c new file mode 100644 index 00000000000..67f1a3387ce --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_4 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + vint8mf2_t v; + for (size_t i = 0; i < n; i++) + { + for (size_t j = 0; j < m; j += 1) { + if (j % 2 == 0) { + v = *(vint8mf2_t*)(in + i + j); + } else { + *(vint8mf2_t*)(out + i + j) = v; + } + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c new file mode 100644 index 00000000000..b2f4feed76e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_5 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + vint8mf2_t v; + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + for (size_t j = 0; j < m; j += 1) { + if (j % 2 == 0) { + v = *(vint8mf2_t*)(in + i + j); + } else { + *(vint8mf2_t*)(out + i + j) = v; + } + } + } else { + *(vint8mf2_t*)(out + i) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c new file mode 100644 index 00000000000..4eb57de0de8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_6 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + vint8mf2_t v; + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + for (size_t j = 0; j < m; j += 1) { + if (j % 2 == 0) { + v = *(vint8mf2_t*)(in + i + j); + } else { + *(vint8mf2_t*)(out + i + j) = v; + } + } + } else { + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c new file mode 100644 index 00000000000..047369e7734 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_3 (int32_t * restrict in, int32_t * restrict out, size_t n, int cond) +{ + for (size_t i = 0; i < n; i++) + { + if (i % 16 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } else if (i % 8 == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + i + 200); + *(vint16mf4_t*)(out + i + 200) = v; + } else if (i % 4 == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + i + 300); + *(vint32mf2_t*)(out + i + 300) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400); + *(vbool64_t*)(out + i + 400) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c new file mode 100644 index 00000000000..05e9810609e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_4 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + for (size_t i = 0; i < n; i++) + { + for (size_t j = 0; j < m; j += 1) { + if (i % 16 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100 + j); + *(vint8mf8_t*)(out + i + 100 + j) = v; + } else if (i % 8 == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + i + 200 + j); + *(vint16mf4_t*)(out + i + 200 + j) = v; + } else if (i % 4 == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + i + 300 + j); + *(vint32mf2_t*)(out + i + 300 + j) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400 + j); + *(vbool64_t*)(out + i + 400 + j) = v; + } + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c new file mode 100644 index 00000000000..0f6b96e6db6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_5 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + for (size_t j = 0; j < m; j += 1) { + if (i % 16 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100 + j); + *(vint8mf8_t*)(out + i + 100 + j) = v; + } else if (i % 8 == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + i + 200 + j); + *(vint16mf4_t*)(out + i + 200 + j) = v; + } else if (i % 4 == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + i + 300 + j); + *(vint32mf2_t*)(out + i + 300 + j) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400 + j); + *(vbool64_t*)(out + i + 400 + j) = v; + } + } + } else { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 88888); + *(vfloat32mf2_t*)(out + 88888) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c new file mode 100644 index 00000000000..a211beda0e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_6 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + for (size_t j = 0; j < m; j += 1) { + if (i % 16 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100 + j); + *(vint8mf8_t*)(out + i + 100 + j) = v; + } else if (i % 8 == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + i + 200 + j); + *(vint16mf4_t*)(out + i + 200 + j) = v; + } else if (i % 4 == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + i + 300 + j); + *(vint32mf2_t*)(out + i + 300 + j) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400 + j); + *(vbool64_t*)(out + i + 400 + j) = v; + } + } + } else { + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c new file mode 100644 index 00000000000..b38e362b880 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + switch (cond) + { + case 0: + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + break; + + default: + for (int i = 0; i < n; i++) { + out[i] = out[i] + 3; + } + break; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c new file mode 100644 index 00000000000..2edc1810ab2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c @@ -0,0 +1,155 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + switch (cond) + { + case 0: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + break; + case 1: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 3; + } + } + break; + case 2: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 5; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 6; + } + } + break; + case 4: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 8; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 9; + } + } + break; + case 5: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 10; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 11; + } + } + break; + case 6: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 12; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 13; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] * out[i]; + } + } + break; + case 7: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 15; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 16; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } + break; + case 8: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 101; + } + } + break; + case 9: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] * 101; + } + } + break; + case 10: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] >> 3; + } + } + break; + default: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] << 1; + } + } + break; + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c new file mode 100644 index 00000000000..68d595fbbaa --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c new file mode 100644 index 00000000000..f49eebdf20b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c @@ -0,0 +1,149 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + switch (cond) + { + case 0: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + break; + case 1: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 3; + } + } + break; + case 2: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 5; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 6; + } + } + break; + case 4: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 8; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 9; + } + } + break; + case 5: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 10; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 11; + } + } + break; + case 6: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 12; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 13; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] * out[i]; + } + } + break; + case 7: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 15; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 16; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } + break; + case 8: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 101; + } + } + break; + case 9: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] * 101; + } + } + break; + case 10: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] >> 3; + } + } + break; + default: + break; + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c new file mode 100644 index 00000000000..8483cdc3e96 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +