From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id C07EC3858D1E; Fri, 23 Dec 2022 05:42:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C07EC3858D1E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1671774148; bh=ENurASmYRpxHmNhMh9KnPmYKjv4EVUxMbkHiOUlgbEk=; h=From:To:Subject:Date:From; b=wqm1xSqkM2HJBu4pwJN00KZsuz+EqXFFgv2iCtHoWYnyPE/O8uiYtmN/9PyPyvrqq V+gDER3mFKO/9gGXkoTPQ02UGsInKN9DuDG0fkcrnUbUCGl2QGx7lGh6IfFq/r1Ztl lxIkQXF6NKSR2xHHZTZ1HcFI1KTTpVLVXEFoxxcU= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-4863] RISC-V: Fix muti-line condition format X-Act-Checkin: gcc X-Git-Author: Ju-Zhe Zhong X-Git-Refname: refs/heads/master X-Git-Oldrev: 7e76cd96950f49ce21246d44780e972d86b2bcdd X-Git-Newrev: 85112fbbfd939f87fb12a00e40ab423ddcfa8ca1 Message-Id: <20221223054228.C07EC3858D1E@sourceware.org> Date: Fri, 23 Dec 2022 05:42:28 +0000 (GMT) List-Id: https://gcc.gnu.org/g:85112fbbfd939f87fb12a00e40ab423ddcfa8ca1 commit r13-4863-g85112fbbfd939f87fb12a00e40ab423ddcfa8ca1 Author: Ju-Zhe Zhong Date: Tue Dec 20 07:09:35 2022 +0800 RISC-V: Fix muti-line condition format gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (vlmax_avl_insn_p): Fix multi-line conditional. (vsetvl_insn_p): Ditto. (same_bb_and_before_p): Ditto. (same_bb_and_after_or_equal_p): Ditto. Diff: --- gcc/config/riscv/riscv-vsetvl.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 3ca3fc15e5a..0c2ff630e96 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -112,8 +112,8 @@ vlmax_avl_p (rtx x) static bool vlmax_avl_insn_p (rtx_insn *rinsn) { - return INSN_CODE (rinsn) == CODE_FOR_vlmax_avlsi - || INSN_CODE (rinsn) == CODE_FOR_vlmax_avldi; + return (INSN_CODE (rinsn) == CODE_FOR_vlmax_avlsi + || INSN_CODE (rinsn) == CODE_FOR_vlmax_avldi); } static bool @@ -156,24 +156,24 @@ vector_config_insn_p (rtx_insn *rinsn) static bool vsetvl_insn_p (rtx_insn *rinsn) { - return INSN_CODE (rinsn) == CODE_FOR_vsetvldi - || INSN_CODE (rinsn) == CODE_FOR_vsetvlsi; + return (INSN_CODE (rinsn) == CODE_FOR_vsetvldi + || INSN_CODE (rinsn) == CODE_FOR_vsetvlsi); } /* Return true if INSN1 comes befeore INSN2 in the same block. */ static bool same_bb_and_before_p (const insn_info *insn1, const insn_info *insn2) { - return (insn1->bb ()->index () == insn2->bb ()->index ()) - && (*insn1 < *insn2); + return ((insn1->bb ()->index () == insn2->bb ()->index ()) + && (*insn1 < *insn2)); } /* Return true if INSN1 comes after or equal INSN2 in the same block. */ static bool same_bb_and_after_or_equal_p (const insn_info *insn1, const insn_info *insn2) { - return (insn1->bb ()->index () == insn2->bb ()->index ()) - && (*insn1 >= *insn2); + return ((insn1->bb ()->index () == insn2->bb ()->index ()) + && (*insn1 >= *insn2)); } /* An "anticipatable occurrence" is one that is the first occurrence in the