From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 3AB5C3858D33; Fri, 6 Jan 2023 00:40:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3AB5C3858D33 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1672965629; bh=wq0JTXWqDqrDU/mPEWMcJCVgq09Kw/w0L719YFaLxiU=; h=From:To:Subject:Date:From; b=b4s/QDShQuHAL2Rv7ZTgTgfirO4XvtI+19yRGCAEVFSdOyq4IYFlwKzlhKxEMPuDM 026HdNffUVGY1m9rk03wX4ENGJtEMt0M0hBkg+zZ2vgh4xNZdbCIcHHMDyaMeV+rDW Npl65DCCHIa3S+MJQMeRZPCak1s44U4hSfNP5NMs= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work104)] Rework precision setup in genmodes. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work104 X-Git-Oldrev: 5d12fc09b9b813e6f1888c9dec5ed1d166ede22f X-Git-Newrev: dbc15479d76aa68f37d5074e574a83125012b6db Message-Id: <20230106004029.3AB5C3858D33@sourceware.org> Date: Fri, 6 Jan 2023 00:40:29 +0000 (GMT) List-Id: https://gcc.gnu.org/g:dbc15479d76aa68f37d5074e574a83125012b6db commit dbc15479d76aa68f37d5074e574a83125012b6db Author: Michael Meissner Date: Thu Jan 5 19:39:49 2023 -0500 Rework precision setup in genmodes. 2022-01-05 Michael Meissner gcc/ * gcc/config/rs6000/rs6000-modes.h: Delete. * config/rs6000/rs6000-modes.def (rs6000-modes.h): Remove inclusion. (IFmode): Rework set up to use FRACTIONAL_FLOAT_MODE_NO_WIDEN. Use 128 as the precision. (KFmode): Likewise. (TFmode): Use FRACTIONAL_FLOAT_MODE, and not FRACTIONAL_FLOAT_MODE_NO_WIDEN. Set the precision to 128. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Use 128 bits as the precision for 128-bit float, instead of special values for the 3 different 128-bit FP modes. * config/rs6000/rs6000.h (rs6000-modes.h): Remove inclusion. * config/rs6000/t-rs6000 (TM_H): Don't add rs6000-modes.h. * genmodes.cc (struct mode_data): Add no widen field. (blank_mode): Likewise. (FRACTIONAL_FLOAT_MODE): Add support for NO_WIDEN capability. (FRACTIONAL_FLOAT_MODE_NO_WIDEN): New macro. (make_float_mode): Add support for NO_WIDEN capability. (emit_mode_wider): Likewise. * machmode.def (FRACTIONAL_FLOAT_MODE_NO_WIDEN): Document. Diff: --- gcc/config/rs6000/rs6000-modes.def | 36 +++++++++++------------------------- gcc/config/rs6000/rs6000-modes.h | 36 ------------------------------------ gcc/config/rs6000/rs6000.cc | 9 +-------- gcc/config/rs6000/rs6000.h | 5 ----- gcc/config/rs6000/t-rs6000 | 1 - gcc/genmodes.cc | 16 +++++++++++++--- gcc/machmode.def | 6 ++++++ 7 files changed, 31 insertions(+), 78 deletions(-) diff --git a/gcc/config/rs6000/rs6000-modes.def b/gcc/config/rs6000/rs6000-modes.def index 8ef910869c5..6f93b8f7b13 100644 --- a/gcc/config/rs6000/rs6000-modes.def +++ b/gcc/config/rs6000/rs6000-modes.def @@ -18,39 +18,25 @@ along with GCC; see the file COPYING3. If not see . */ -/* We order the 3 128-bit floating point types so that IFmode (IBM 128-bit - floating point) is the 128-bit floating point type with the highest - precision (128 bits). This so that machine independent parts of the - compiler do not try to widen IFmode to TFmode on ISA 3.0 (power9) that has - hardware support for IEEE 128-bit. We set TFmode (long double mode) in - between, and KFmode (explicit __float128) below it. - - Previously, IFmode and KFmode were defined to be fractional modes and TFmode - was the standard mode. Since IFmode does not define the normal arithmetic - insns (other than neg/abs), on a ISA 3.0 system, the machine independent - parts of the compiler would see that TFmode has the necessary hardware - support, and widen the operation from IFmode to TFmode. However, IEEE - 128-bit is not strictly a super-set of IBM extended double and the - conversion to/from IEEE 128-bit was a function call. - - We now make IFmode the highest fractional mode, which means its values are - not considered for widening. Since we don't define insns for IFmode, the - IEEE 128-bit modes would not widen to IFmode. */ - -#ifndef RS6000_MODES_H -#include "config/rs6000/rs6000-modes.h" -#endif +/* We mark IFmode and KFmode as being types that are not in the mode_wider and + mode_2xwider tables. Thus these types will never automatically be widened + to when the compiler can't perform an operation in a smaller mode. Also, + the float_mode_for_size function will only return TFmode if the size is 128 + bits. */ /* IBM 128-bit floating point. */ -FRACTIONAL_FLOAT_MODE (IF, FLOAT_PRECISION_IFmode, 16, ibm_extended_format); +FRACTIONAL_FLOAT_MODE_NO_WIDEN (IF, 128, 16, ibm_extended_format); /* Explicit IEEE 128-bit floating point. */ -FRACTIONAL_FLOAT_MODE (KF, FLOAT_PRECISION_KFmode, 16, ieee_quad_format); +FRACTIONAL_FLOAT_MODE_NO_WIDEN (KF, 128, 16, ieee_quad_format); /* 128-bit floating point, either IBM 128-bit or IEEE 128-bit. This is adjusted in rs6000_option_override_internal to be the appropriate floating point type. */ -FRACTIONAL_FLOAT_MODE (TF, FLOAT_PRECISION_TFmode, 16, ieee_quad_format); +FLOAT_MODE (TF, 16, ieee_quad_format); +ADJUST_FLOAT_FORMAT (TF, (TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD + ? &ibm_extended_format + : &ieee_quad_format)); /* Add any extra modes needed to represent the condition code. diff --git a/gcc/config/rs6000/rs6000-modes.h b/gcc/config/rs6000/rs6000-modes.h deleted file mode 100644 index 64abf886db3..00000000000 --- a/gcc/config/rs6000/rs6000-modes.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Definitions 128-bit floating point precisions used by PowerPC. - Copyright (C) 2018-2022 Free Software Foundation, Inc. - Contributed by Michael Meissner (meissner@linux.ibm.com) - - This file is part of GCC. - - GCC is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published - by the Free Software Foundation; either version 3, or (at your - option) any later version. - - GCC is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public - License for more details. - - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see - . */ - -/* We order the 3 128-bit floating point types so that IFmode (IBM 128-bit - floating point) is the 128-bit floating point type with the highest - precision (128 bits). This so that machine independent parts of the - compiler do not try to widen IFmode to TFmode on ISA 3.0 (power9) that has - hardware support for IEEE 128-bit. We set TFmode (long double mode) in - between, and KFmode (explicit __float128) below it. - - We won't encounter conversion from IEEE 128-bit to IBM 128-bit because we - don't have insns to support the IBM 128-bit aritmetic operations. */ - -#ifndef RS6000_MODES_H -#define RS6000_MODES_H 1 -#define FLOAT_PRECISION_IFmode 128 -#define FLOAT_PRECISION_TFmode 127 -#define FLOAT_PRECISION_KFmode 126 -#endif /* RS6000_MODES_H */ diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 585faedc4e6..9240887a5d3 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -4115,7 +4115,7 @@ rs6000_option_override_internal (bool global_init_p) 128 into the precision used for TFmode. */ int default_long_double_size = (RS6000_DEFAULT_LONG_DOUBLE_SIZE == 64 ? 64 - : FLOAT_PRECISION_TFmode); + : 128); /* Set long double size before the IEEE 128-bit tests. */ if (!OPTION_SET_P (rs6000_long_double_type_size)) @@ -4127,10 +4127,6 @@ rs6000_option_override_internal (bool global_init_p) else rs6000_long_double_type_size = default_long_double_size; } - else if (rs6000_long_double_type_size == FLOAT_PRECISION_TFmode) - ; /* The option value can be seen when cl_target_option_restore is called. */ - else if (rs6000_long_double_type_size == 128) - rs6000_long_double_type_size = FLOAT_PRECISION_TFmode; /* Set -mabi=ieeelongdouble on some old targets. In the future, power server systems will also set long double to be IEEE 128-bit. AIX and Darwin @@ -4562,9 +4558,6 @@ rs6000_option_override_internal (bool global_init_p) flag_signed_bitfields = 0; #endif - if (TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD) - REAL_MODE_FORMAT (TFmode) = &ibm_extended_format; - ASM_GENERATE_INTERNAL_LABEL (toc_label_name, "LCTOC", 1); /* We can only guarantee the availability of DI pseudo-ops when diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index b4df22b6030..440ab55a067 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -30,11 +30,6 @@ #include "config/rs6000/rs6000-opts.h" #endif -/* 128-bit floating point precision values. */ -#ifndef RS6000_MODES_H -#include "config/rs6000/rs6000-modes.h" -#endif - /* Definitions for the object file format. These are set at compile-time. */ diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000 index 597cea423ec..72bf66dddf2 100644 --- a/gcc/config/rs6000/t-rs6000 +++ b/gcc/config/rs6000/t-rs6000 @@ -19,7 +19,6 @@ # . TM_H += $(srcdir)/config/rs6000/rs6000-cpus.def -TM_H += $(srcdir)/config/rs6000/rs6000-modes.h PASSES_EXTRA += $(srcdir)/config/rs6000/rs6000-passes.def EXTRA_GTYPE_DEPS += rs6000-builtins.h diff --git a/gcc/genmodes.cc b/gcc/genmodes.cc index 2d418f09aab..7848a00efea 100644 --- a/gcc/genmodes.cc +++ b/gcc/genmodes.cc @@ -79,6 +79,8 @@ struct mode_data adjustment */ unsigned int int_n; /* If nonzero, then __int will be defined */ bool boolean; + bool no_widen; /* Whether the type should not be listed in the + mode_wider and mode_2xwider tables. */ }; static struct mode_data *modes[MAX_MODE_CLASS]; @@ -90,7 +92,7 @@ static const struct mode_data blank_mode = { 0, -1U, -1U, -1U, -1U, 0, 0, 0, 0, 0, 0, "", 0, 0, 0, 0, false, false, 0, - false + false, false }; static htab_t modes_by_name; @@ -658,18 +660,22 @@ make_fixed_point_mode (enum mode_class cl, #define FLOAT_MODE(N, Y, F) FRACTIONAL_FLOAT_MODE (N, -1U, Y, F) #define FRACTIONAL_FLOAT_MODE(N, B, Y, F) \ - make_float_mode (#N, B, Y, #F, __FILE__, __LINE__) + make_float_mode (#N, B, Y, #F, __FILE__, __LINE__, false) +#define FRACTIONAL_FLOAT_MODE_NO_WIDEN(N, B, Y, F) \ + make_float_mode (#N, B, Y, #F, __FILE__, __LINE__, true) static void make_float_mode (const char *name, unsigned int precision, unsigned int bytesize, const char *format, - const char *file, unsigned int line) + const char *file, unsigned int line, + bool no_widen) { struct mode_data *m = new_mode (MODE_FLOAT, name, file, line); m->bytesize = bytesize; m->precision = precision; m->format = format; + m->no_widen = no_widen; } #define DECIMAL_FLOAT_MODE(N, Y, F) \ @@ -1552,6 +1558,8 @@ emit_mode_wider (void) || m->cl == MODE_UACCUM) for (m2 = m->wider; m2 && m2 != void_mode; m2 = m2->wider) { + if (m2->no_widen) + continue; if (m2->bytesize == m->bytesize && m2->precision == m->precision) continue; @@ -1576,6 +1584,8 @@ emit_mode_wider (void) m2 && m2 != void_mode; m2 = m2->wider) { + if (m2->no_widen) + continue; if (m2->bytesize < 2 * m->bytesize) continue; if (m->precision != (unsigned int) -1) diff --git a/gcc/machmode.def b/gcc/machmode.def index 62e2ba10d45..fb10a3af705 100644 --- a/gcc/machmode.def +++ b/gcc/machmode.def @@ -90,6 +90,12 @@ along with GCC; see the file COPYING3. If not see storage, but with only PRECISION significant bits, using floating point format FORMAT. + FRACTIONAL_FLOAT_MODE_NO_WIDEN (MODE, PRECISION, BYTESIZE, FORMAT); + declares MODE to be of class FLOAT, BYTESIZE bytes wide in + storage, but with only PRECISION significant bits, using + floating point format FORMAT. Unlike FRACTIONAL_FLOAT_MODE, + MODE is not listed in the mode_wider and mode_2xwider tables. + DECIMAL_FLOAT_MODE (MODE, BYTESIZE, FORMAT); declares MODE to be of class DECIMAL_FLOAT and BYTESIZE bytes wide. All of the bits of its representation are significant.