From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 35B0D3858C66; Thu, 12 Jan 2023 22:52:45 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 35B0D3858C66 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1673563965; bh=p5I1r7DS1Fa1oUgjICUrMXxHPvrnuQEmbQT43Zsl2/U=; h=From:To:Subject:Date:From; b=xius0IvfRQenh777vG3pwHAGtTEk0r81DYdU6Ir1rAed8ovkt8YPMbR4cCVTSeMCi R4NLogc9EESULnsS4PUf/5YkdMz+WD6FZ3U7KLTRoYHgvkoPeaHdi9SBSMZPI5AOP9 UCW1YIXeb1gOaB3ahxE/rBqQVehF3mCKhLa/X1wE= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work105)] Update ChangeLog.meissner X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work105 X-Git-Oldrev: a8b6e28644a5e0fd7e5e1570015995551c5eec6e X-Git-Newrev: 1af19982ab17213bae550d4cee8d348e86680e42 Message-Id: <20230112225245.35B0D3858C66@sourceware.org> Date: Thu, 12 Jan 2023 22:52:45 +0000 (GMT) List-Id: https://gcc.gnu.org/g:1af19982ab17213bae550d4cee8d348e86680e42 commit 1af19982ab17213bae550d4cee8d348e86680e42 Author: Michael Meissner Date: Thu Jan 12 17:52:40 2023 -0500 Update ChangeLog.meissner Diff: --- gcc/ChangeLog.meissner | 200 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 200 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 592ef2ae151..119e5782357 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,203 @@ +==================== Patch #4, work105 branch ==================== + +PR target/107299 + +2022-12-27 Kewen Lin + +gcc/ChangeLog: + + * tree.cc (build_common_tree_nodes): Remove workaround for rs6000 + KFmode. + +==================== Patch #3, work105 branch ==================== + +Update float 128-bit conversions, PR target/107299. + +This patch fixes two tests that are still failing when long double is IEEE +128-bit after the previous 2 patches for PR target/107299 have been applied. +The tests are: + + gcc.target/powerpc/convert-fp-128.c + gcc.target/powerpc/pr85657-3.c + +This patch is a rewrite of the patch submitted on August 18th: + +| https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599988.html + +This patch reworks the conversions between 128-bit binary floating point types. +Previously, we would call rs6000_expand_float128_convert to do all conversions. +Now, we only define the conversions between the same representation that turn +into a NOP. The appropriate extend or truncate insn is generated, and after +register allocation, it is converted to a move. + +This patch also fixes two places where we want to override the external name +for the conversion function, and the wrong optab was used. Previously, +rs6000_expand_float128_convert would handle the move or generate the call as +needed. Now, it lets the machine independent code generate the call. But if +we use the machine independent code to generate the call, we need to update the +name for two optabs where a truncate would be used in terms of converting +between the modes. This patch updates those two optabs. + +This patch was previously submitted on December 14th, 2022. This patch changes +one built-in function from a FLOAT_TRUNCATE to a FLOAT_EXTEND, which is needed +by the previous patch to genmodes.cc to allow allow the same precision to be +used for various modes. + +2022-01-10 Michael Meissner + +gcc/ + + PR target/107299 + * config/rs6000/rs6000.cc (init_float128_ieee): Use the correct + float_extend or float_truncate optab based on how the machine converts + between IEEE 128-bit and IBM 128-bit. + * config/rs6000/rs6000.md (IFKF): Delete. + (IFKF_reg): Delete. + (extendiftf2): Rewrite to be a move if IFmode and TFmode are both IBM + 128-bit. Do not run if TFmode is IEEE 128-bit. + (extendifkf2): Delete. + (extendtfkf2): Delete. + (extendtfif2): Delete. + (trunciftf2): Delete. + (truncifkf2): Delete. + (trunckftf2): Delete. + (extendkftf2): Implement conversion of IEEE 128-bit types as a move. + (trunctfif2): Delete. + (trunctfkf2): Implement conversion of IEEE 128-bit types as a move. + (extendtf2_internal): Delete. + (extendtf2_internal): Delete. + +==================== Patch #2, work105 branch ==================== + +Improve PowerPC 128-bit floating point precision support. + +This patch improves the code for the 3 PowerPC 128-bit floating point types. + +There are two main additions with this patch: + + 1) Allow the backend to adjust the precision of the 3 types at runtime. + This allows us to use the same precision for both long double and + for either __float128 or __ibm128 types. By having the same precision, + it makes it easier for the machine independent part of the compiler to + realize that these modes are talking to the same representation. + + 2) Prevent __ibm128 and __float128 from being considered in the automatic + widening that the compiler does. This way, you don't have the + possibility that IFmode (__ibm128) will be widened to TFmode or KFmode, + even there is hardware to support the IEEE 128-bit operations. + +Fortran depends on the current precision values to identify whether the +current floating point type is IBM extended double or IEEE 128-bit. While it +might be nice to fix this in the future so that can just set the precision of +all 3 modes to be 128, I decided to not make this incompatible change and break +Fortran. + +I also moved changing the TFmode format from ieee to ibm to rs6000-modes.def +from rs6000.cc. + +2022-01-10 Michael Meissner + +gcc/ + + * config/rs6000/rs6000-modes.def (IFmode): Rework to use + FRACTIONAL_FLOAT_MODE_NO_WIDEN. Adjust the precision if long double + uses the same representation. + (KFmode): Likewise. + (TFmode): Rework to use FRACTIONAL_FLOAT_MODE_NO_WIDEN. Adjust the + format of TFmode based on the -mabi={ibm,ieee}longdouble option. + * expr.cc (convert_mode_scalar): Don't abort if we are converting + floating point modes that are the same precision but use different + encodings. + * genmodes.cc (struct mode_data): Add support for no widening and + adjusting precision. + (blank_mode): Likewise. + (FRACTIONAL_FLOAT_MODE): Add support for no widening capability. + (FRACTIONAL_FLOAT_MODE_NO_WIDEN): New macro. + (make_float_mode): Add support for no widening capability. + (cmp_modes): Likewise. + (emit_mode_unit_precision_inline): Add support for adjusting the + precision. + (emit_insn_modes_h): Likewise. + (emit_mode_wider): Add support for no widening capability. + (emit_mode_unit_precision): Add support for adjusting the precision. + (emit_mode_adjustments): Likewise. + * machmode.def (FRACTIONAL_FLOAT_MODE_NO_WIDEN): Document. + * machmode.h (mode_unit_precision): Add suport for adjusting the + precision. + +==================== Patch #1, work105 branch ==================== + +Rework 128-bit complex multiply and divide. + +This patch reworks how the complex multiply and divide built-in functions are +done. Previously we created built-in declarations for doing long double complex +multiply and divide when long double is IEEE 128-bit. The old code also did not +support __ibm128 complex multiply and divide if long double is IEEE 128-bit. + +In terms of history, I wrote the original code just as I was starting to test +GCC on systems where IEEE 128-bit long double was the default. At the time, we +had not yet started mangling the built-in function names as a way to bridge +going from a system with 128-bit IBM long double to 128-bin IEEE long double. + +The original code depends on there only being two 128-bit types invovled. With +the next patch in this series, this assumption will no longer be true. When +long double is IEEE 128-bit, there will be 2 IEEE 128-bit types (one for the +explicit __float128/_Float128 type and one for long double). + +The problem is we cannot create two separate built-in functions that resolve to +the same name. This is a requirement of add_builtin_function and the C front +end. That means for the 3 possible modes (IFmode, KFmode, and TFmode), you can +only use 2 of them. + +This code does not create the built-in declaration with the changed name. +Instead, it uses the TARGET_MANGLE_DECL_ASSEMBLER_NAME hook to change the name +before it is written out to the assembler file like it now does for all of the +other long double built-in functions. + +When I wrote these patches, I discovered that __ibm128 complex multiply and +divide had originally not been supported if long double is IEEE 128-bit as it +would generate calls to __mulic3 and __divic3. I added tests in the testsuite +to verify that the correct name (i.e. __multc3 and __divtc3) is used in this +case. + +I had previously sent this patch out on November 1st. Compared to that version, +this version no longer disables the special mapping when you are building +libgcc, as it turns out we don't need it. + +I tested all 3 patchs for PR target/107299 on: + + 1) LE Power10 using --with-cpu=power10 --with-long-double-format=ieee + 2) LE Power10 using --with-cpu=power10 --with-long-double-format=ibm + 3) LE Power9 using --with-cpu=power9 --with-long-double-format=ibm + 4) BE Power8 using --with-cpu=power8 --with-long-double-format=ibm + +Once all 3 patches have been applied, we can once again build GCC when long +double is IEEE 128-bit. There were no other regressions with these patches. +Can I check these patches into the trunk? + +2023-01-10 Michael Meissner + +gcc/ + + PR target/107299 + * config/rs6000/rs6000.cc (create_complex_muldiv): Delete. + (init_float128_ieee): Delete code to switch complex multiply and divide + for long double. + (complex_multiply_builtin_code): New helper function. + (complex_divide_builtin_code): Likewise. + (rs6000_mangle_decl_assembler_name): Add support for mangling the name + of complex 128-bit multiply and divide built-in functions. + +gcc/testsuite/ + + PR target/107299 + * gcc.target/powerpc/divic3-1.c: New test. + * gcc.target/powerpc/divic3-2.c: Likewise. + * gcc.target/powerpc/mulic3-1.c: Likewise. + * gcc.target/powerpc/mulic3-2.c: Likewise. + +==================== Basline ==================== + 2023-01-10 Michael Meissner Clone branch