From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1039) id 741153858D32; Mon, 16 Jan 2023 22:11:47 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 741153858D32 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1673907107; bh=g2N3QVzIl2hT5soopJ4UoJPv+8WxY1mMpWVEI9TFnHA=; h=From:To:Subject:Date:From; b=fIPFkSUlfnKh1XUSnNUtWMUYGqFjdHQKeVqoj9FDq8bcZBVY7PTOLy9kThiVSEFQV Cgfk7KJyNraqxvOMu2xtSeufrDYjM08K6yJqXkyK5iDo49Gl6Iij1CS5jpj8PC7LSf MGRBwR3Kk/n2DLVUE8dfp6qnSPU+AG2cp4O36b3A= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: H.J. Lu To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-5218] x86: Disable -mforce-indirect-call for PIC in 32-bit mode X-Act-Checkin: gcc X-Git-Author: H.J. Lu X-Git-Refname: refs/heads/master X-Git-Oldrev: 2bf9bbfe5b377003a29d6560d69baa605382b895 X-Git-Newrev: a396a123596d82d4a2f14dc43a382cb17826411c Message-Id: <20230116221147.741153858D32@sourceware.org> Date: Mon, 16 Jan 2023 22:11:47 +0000 (GMT) List-Id: https://gcc.gnu.org/g:a396a123596d82d4a2f14dc43a382cb17826411c commit r13-5218-ga396a123596d82d4a2f14dc43a382cb17826411c Author: H.J. Lu Date: Mon Jan 16 10:45:41 2023 -0800 x86: Disable -mforce-indirect-call for PIC in 32-bit mode -mforce-indirect-call generates invalid instruction in 32-bit MI thunk since there are no available scratch registers in 32-bit PIC mode. Disable -mforce-indirect-call for PIC in 32-bit mode when generating MI thunk. gcc/ PR target/105980 * config/i386/i386.cc (x86_output_mi_thunk): Disable -mforce-indirect-call for PIC in 32-bit mode. gcc/testsuite/ PR target/105980 * g++.target/i386/pr105980.C: New test. Diff: --- gcc/config/i386/i386.cc | 6 ++++++ gcc/testsuite/g++.target/i386/pr105980.C | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 19fb03cfd44..3cacf738c4a 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -21480,6 +21480,7 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, rtx this_reg, tmp, fnaddr; unsigned int tmp_regno; rtx_insn *insn; + int saved_flag_force_indirect_call = flag_force_indirect_call; if (TARGET_64BIT) tmp_regno = R10_REG; @@ -21492,6 +21493,9 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, tmp_regno = DX_REG; else tmp_regno = CX_REG; + + if (flag_pic) + flag_force_indirect_call = 0; } emit_note (NOTE_INSN_PROLOGUE_END); @@ -21659,6 +21663,8 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, final (insn, file, 1); final_end_function (); assemble_end_function (thunk_fndecl, fnname); + + flag_force_indirect_call = saved_flag_force_indirect_call; } static void diff --git a/gcc/testsuite/g++.target/i386/pr105980.C b/gcc/testsuite/g++.target/i386/pr105980.C new file mode 100644 index 00000000000..d8dbc332ea2 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr105980.C @@ -0,0 +1,8 @@ +// { dg-do assemble { target { fpic } } } +// { dg-options "-O0 -fpic -mforce-indirect-call" } + +struct A { + virtual ~A(); +}; +struct B : virtual A {}; +void bar() { B(); }