From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1922) id C56FD3858430; Thu, 19 Jan 2023 07:16:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C56FD3858430 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1674112594; bh=iOaN9vtqE27vs/JW831hSL9bNetcvVSbH+G8/rnFd/E=; h=From:To:Subject:Date:From; b=RBsv2Z1x3S8ydu3qTDSVzSaS1HLa1bHHfrzVPLg0jVItHFHHlX/vFtjzg1nPutrLC QRoj4gAYbL5KN+Vub8vczM+nQxZSPGWDWl40FzY64Oeq9wIa30SAA4ZtohN6EpiieL jI4SApCpOm4RituvSXxcePVkQxBGvtPn4XFv8Gj8= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Prathamesh Kulkarni To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-5253] [aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns. X-Act-Checkin: gcc X-Git-Author: Prathamesh Kulkarni X-Git-Refname: refs/heads/master X-Git-Oldrev: 3c99493bf39a7fef9213e6f5af94b78bb15fcfdc X-Git-Newrev: 22c75b4ed94bd731cb6e37c507de1d91954a17cf Message-Id: <20230119071634.C56FD3858430@sourceware.org> Date: Thu, 19 Jan 2023 07:16:34 +0000 (GMT) List-Id: https://gcc.gnu.org/g:22c75b4ed94bd731cb6e37c507de1d91954a17cf commit r13-5253-g22c75b4ed94bd731cb6e37c507de1d91954a17cf Author: Prathamesh Kulkarni Date: Thu Jan 19 12:43:55 2023 +0530 [aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns. gcc/ChangeLog: * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set): Use exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating the pattern. (aarch64_simd_vec_copy_lane): Likewise. (aarch64_simd_vec_copy_lane_): Likewise. Diff: --- gcc/config/aarch64/aarch64-simd.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 31d9e8980ea..7f212bf37cd 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -1064,7 +1064,7 @@ (match_operand: 1 "aarch64_simd_nonimmediate_operand" "w,?r,Utv")) (match_operand:VALL_F16 3 "register_operand" "0,0,0") (match_operand:SI 2 "immediate_operand" "i,i,i")))] - "TARGET_SIMD" + "TARGET_SIMD && exact_log2 (INTVAL (operands[2])) >= 0" { int elt = ENDIAN_LANE_N (, exact_log2 (INTVAL (operands[2]))); operands[2] = GEN_INT ((HOST_WIDE_INT) 1 << elt); @@ -1093,7 +1093,7 @@ [(match_operand:SI 4 "immediate_operand" "i")]))) (match_operand:VALL_F16 1 "register_operand" "0") (match_operand:SI 2 "immediate_operand" "i")))] - "TARGET_SIMD" + "TARGET_SIMD && exact_log2 (INTVAL (operands[2])) >= 0" { int elt = ENDIAN_LANE_N (, exact_log2 (INTVAL (operands[2]))); operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt); @@ -1114,7 +1114,7 @@ [(match_operand:SI 4 "immediate_operand" "i")]))) (match_operand:VALL_F16_NO_V2Q 1 "register_operand" "0") (match_operand:SI 2 "immediate_operand" "i")))] - "TARGET_SIMD" + "TARGET_SIMD && exact_log2 (INTVAL (operands[2])) >= 0" { int elt = ENDIAN_LANE_N (, exact_log2 (INTVAL (operands[2]))); operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt);