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From: Andrea Corallo <akrl@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-5290] [PATCH 2/15] arm: Add Armv8.1-M Mainline target feature +pacbti Date: Mon, 23 Jan 2023 10:46:31 +0000 (GMT) [thread overview] Message-ID: <20230123104631.0BC043858C2F@sourceware.org> (raw) https://gcc.gnu.org/g:c91bb7b9fc87284f5382d9fb04db0cb10f6c1fe9 commit r13-5290-gc91bb7b9fc87284f5382d9fb04db0cb10f6c1fe9 Author: Andrea Corallo <andrea.corallo@arm.com> Date: Mon Dec 6 11:38:32 2021 +0100 [PATCH 2/15] arm: Add Armv8.1-M Mainline target feature +pacbti This patch adds the -march feature +pacbti to Armv8.1-M Mainline. This feature enables pointer signing and authentication instructions on M-class architectures. Pre-approved here <https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586144.html>. gcc/Changelog: * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro. * config/arm/arm-cpus.in (pacbti): New feature. * doc/invoke.texi (Arm Options): Document it. Co-Authored-By: Tejas Belagod <tbelagod@arm.com> Diff: --- gcc/config/arm/arm-cpus.in | 5 +++++ gcc/config/arm/arm.h | 6 ++++++ gcc/doc/invoke.texi | 3 +++ 3 files changed, 14 insertions(+) diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index 579cf356366..4685599a426 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -229,6 +229,10 @@ define feature cdecp5 define feature cdecp6 define feature cdecp7 +# M-profile control flow integrity extensions (PAC/AUT/BTI). +# Optional from Armv8.1-M Mainline. +define feature pacbti + # Feature groups. Conventionally all (or mostly) upper case. # ALL_FPU lists all the feature bits associated with the floating-point # unit; these will all be removed if the floating-point unit is disabled @@ -743,6 +747,7 @@ begin arch armv8.1-m.main isa ARMv8_1m_main # fp => FPv5-sp-d16; fp.dp => FPv5-d16 option dsp add armv7em + option pacbti add pacbti option fp add FPv5 fp16 option fp.dp add FPv5 FP_DBL fp16 option nofp remove ALL_FP diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 6f7ecf91280..79b9f44e5c9 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -331,6 +331,12 @@ emission of floating point pcs attributes. */ isa_bit_mve_float) \ && !TARGET_GENERAL_REGS_ONLY) +/* Non-zero if this target supports Armv8.1-M Mainline pointer-signing + extension. */ +#define TARGET_HAVE_PACBTI (arm_arch8_1m_main \ + && bitmap_bit_p (arm_active_target.isa, \ + isa_bit_pacbti)) + /* MVE have few common instructions as VFP, like VLDM alias VPOP, VLDR, VSTM alia VPUSH, VSTR and VMOV, VMSR and VMRS. In the same manner it updates few registers such as FPCAR, FPCCR, FPDSCR, FPSCR, MVFR0, MVFR1 and MVFR2. All diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 631c00582bf..e37e92fe241 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -22020,6 +22020,9 @@ Disable the floating-point extension. @item +cdecp0, +cdecp1, ... , +cdecp7 Enable the Custom Datapath Extension (CDE) on selected coprocessors according to the numbers given in the options in the range 0 to 7. + +@item +pacbti +Enable the Pointer Authentication and Branch Target Identification Extension. @end table @item armv8-m.main
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