From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2092) id 21DC63858D28; Wed, 25 Jan 2023 13:49:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 21DC63858D28 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1674654548; bh=XRC+TIZ7rXU8csQz5TtXsZyWTHQWvPX9/uFi3jIcmHM=; h=From:To:Subject:Date:From; b=VX0HvlXJP5lNt13E2WRSGAnoxfS4apybKi0jJfZP6AgCJzLaWOoTCJb5utcgMu2b7 YcI/SCh/haO307qGCHJb+KJzEkC+VVLSLX2U1RWhXrS1cMc1sk2puu+ofa4pWKIir5 uriQRuyVKz9YpxIioE18ozLdOQGiWcaoyEESASRI= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Andrea Corallo To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-5349] arm: improve tests and fix vclsq* X-Act-Checkin: gcc X-Git-Author: Andrea Corallo X-Git-Refname: refs/heads/master X-Git-Oldrev: c29d85359add807200a1a851026b4e4a9d6b714c X-Git-Newrev: dd4424ef898608321b60610c4f3c98737ace3680 Message-Id: <20230125134908.21DC63858D28@sourceware.org> Date: Wed, 25 Jan 2023 13:49:08 +0000 (GMT) List-Id: https://gcc.gnu.org/g:dd4424ef898608321b60610c4f3c98737ace3680 commit r13-5349-gdd4424ef898608321b60610c4f3c98737ace3680 Author: Andrea Corallo Date: Mon Nov 28 17:01:26 2022 +0100 arm: improve tests and fix vclsq* gcc/ChangeLog: * config/arm/mve.md (mve_vclsq_s): Fix spacing. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vclsq_m_s16.c: Use check-function-bodies instead of scan-assembler checks. Use extern "C" for C++ testing. * gcc.target/arm/mve/intrinsics/vclsq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vclsq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vclsq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vclsq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vclsq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vclsq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vclsq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vclsq_x_s8.c: Likewise. Diff: --- gcc/config/arm/mve.md | 2 +- .../gcc.target/arm/mve/intrinsics/vclsq_m_s16.c | 33 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vclsq_m_s32.c | 33 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vclsq_m_s8.c | 33 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vclsq_s16.c | 28 +++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vclsq_s32.c | 28 +++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vclsq_s8.c | 24 ++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vclsq_x_s16.c | 33 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vclsq_x_s32.c | 33 ++++++++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vclsq_x_s8.c | 33 ++++++++++++++++++++-- 10 files changed, 251 insertions(+), 29 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 2e58ad188c4..d4f5a904892 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -469,7 +469,7 @@ VCLSQ_S)) ] "TARGET_HAVE_MVE" - "vcls.s%# %q0, %q1" + "vcls.s%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c index d0eb7008537..1996ac8b03e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vclsq_m_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclst.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vclsq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c index b6d7088a8e7..f51841d024e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vclsq_m_s32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclst.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vclsq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c index 28d4d966802..2975c4cda56 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vclsq_m_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclst.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vclsq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c index e57fbb97080..ed1b5c75b40 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcls.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vclsq_s16 (a); } -/* { dg-final { scan-assembler "vcls.s16" } } */ +/* +**foo1: +** ... +** vcls.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { return vclsq (a); } -/* { dg-final { scan-assembler "vcls.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c index 7fa3038d361..9e5369e04c6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcls.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { return vclsq_s32 (a); } -/* { dg-final { scan-assembler "vcls.s32" } } */ +/* +**foo1: +** ... +** vcls.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { return vclsq (a); } -/* { dg-final { scan-assembler "vcls.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c index b0985484d1d..c4a9468f8e1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcls.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { return vclsq_s8 (a); } -/* { dg-final { scan-assembler "vcls.s8" } } */ +/* +**foo1: +** ... +** vcls.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { return vclsq (a); } -/* { dg-final { scan-assembler "vcls.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c index ab09c9944ae..ea11eceb730 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { return vclsq_x_s16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclst.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, mve_pred16_t p) { return vclsq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c index 09a8dab2f51..1737c561a0b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, mve_pred16_t p) { return vclsq_x_s32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclst.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, mve_pred16_t p) { return vclsq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c index af40f7fa510..a7cdb612ee1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, mve_pred16_t p) { return vclsq_x_s8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclst.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, mve_pred16_t p) { return vclsq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file