From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2092) id 0E1D83858C31; Wed, 25 Jan 2023 13:50:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0E1D83858C31 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1674654625; bh=lLBm63/UDX/jBu1eGSeo5SBI/YwtKsN2XTuDljfTGjs=; h=From:To:Subject:Date:From; b=cA9QPZA2Fp8LY4LSaOw7gELQiz+UTm8qlXRdlQwifV1iI49tA9SOJeHNrK5gCfQ5O AdQy8GDZif0MZz6jP7e1SPyYF8yui5jBIXViUomZpL0Ue+MAyPZm14yDGffIapAB8k TIvEMePr3XQUMifucr9OFRksvnndYk1U6CFAzCRI= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Andrea Corallo To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-5364] arm: improve tests for vqdmlsdhq* X-Act-Checkin: gcc X-Git-Author: Andrea Corallo X-Git-Refname: refs/heads/master X-Git-Oldrev: 26c400b1d82482b905f4d804e959b090fe72ab39 X-Git-Newrev: 8de09beb71a9bdc24c969ab648c4c5570204ab87 Message-Id: <20230125135025.0E1D83858C31@sourceware.org> Date: Wed, 25 Jan 2023 13:50:25 +0000 (GMT) List-Id: https://gcc.gnu.org/g:8de09beb71a9bdc24c969ab648c4c5570204ab87 commit r13-5364-g8de09beb71a9bdc24c969ab648c4c5570204ab87 Author: Andrea Corallo Date: Mon Nov 28 17:44:48 2022 +0100 arm: improve tests for vqdmlsdhq* gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c: Use check-function-bodies instead of scan-assembler checks. Use extern "C" for C++ testing. * gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c: Likewise. Diff: --- .../arm/mve/intrinsics/vqdmlsdhq_m_s16.c | 34 +++++++++++++++++++--- .../arm/mve/intrinsics/vqdmlsdhq_m_s32.c | 34 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c | 34 +++++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c | 24 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c | 24 +++++++++++++-- .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c | 24 +++++++++++++-- 6 files changed, 156 insertions(+), 18 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c index d1e66864d10..f87287ab8cd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqdmlsdhq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlsdht.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqdmlsdhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlsdht.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c index cc80f211ec8..8155aaf843c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqdmlsdhq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlsdht.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqdmlsdhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlsdht.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c index 5c9d81a6526..d39badc7707 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqdmlsdhq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlsdht.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqdmlsdhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlsdht.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c index eb058fb9789..a4fa1d5024b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b) { return vqdmlsdhq_s16 (inactive, a, b); } -/* { dg-final { scan-assembler "vqdmlsdh.s16" } } */ +/* +**foo1: +** ... +** vqdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) { return vqdmlsdhq (inactive, a, b); } -/* { dg-final { scan-assembler "vqdmlsdh.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c index 27b93d6b76c..0c6ba426ded 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b) { return vqdmlsdhq_s32 (inactive, a, b); } -/* { dg-final { scan-assembler "vqdmlsdh.s32" } } */ +/* +**foo1: +** ... +** vqdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) { return vqdmlsdhq (inactive, a, b); } -/* { dg-final { scan-assembler "vqdmlsdh.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c index 1dd2a59ee4b..089c4cdcc39 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b) { return vqdmlsdhq_s8 (inactive, a, b); } -/* { dg-final { scan-assembler "vqdmlsdh.s8" } } */ +/* +**foo1: +** ... +** vqdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) { return vqdmlsdhq (inactive, a, b); } -/* { dg-final { scan-assembler "vqdmlsdh.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file