From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id 340343858C2D; Thu, 26 Jan 2023 19:12:26 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 340343858C2D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1674760346; bh=P5rOWnF8TZNs+djc337iWRh5JYS6ZvixpAYIuMPOq4Y=; h=From:To:Subject:Date:From; b=BUG7v5PE6RebZWq1+nIUS52wlGkPoAC4u+55rVgr8dswQYqs4pcqyFpMr7gBGbuxe sCsfm4xDgDxBU56fIpfC8YdHL/CxL98oPWU0H0xUxz3T7IPVfvyHudDdd7HWPQTSfj 4N3bjbgfg4cvpmJcvrXa0NOjfq6neh6sZiZt0H3w= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-5409] RISC-V: Refine Phase 3 of VSETVL PASS X-Act-Checkin: gcc X-Git-Author: Ju-Zhe Zhong X-Git-Refname: refs/heads/master X-Git-Oldrev: cca9c44eca42d71ef20fc00a261616ba66edd089 X-Git-Newrev: 387cd9d37950a93225f19bc4054e45638dd7d29a Message-Id: <20230126191226.340343858C2D@sourceware.org> Date: Thu, 26 Jan 2023 19:12:26 +0000 (GMT) List-Id: https://gcc.gnu.org/g:387cd9d37950a93225f19bc4054e45638dd7d29a commit r13-5409-g387cd9d37950a93225f19bc4054e45638dd7d29a Author: Ju-Zhe Zhong Date: Wed Jan 4 21:45:26 2023 +0800 RISC-V: Refine Phase 3 of VSETVL PASS gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb. (vector_insn_info::set_demand_info): New function. (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3. (pass_vsetvl::merge_successors): Ditto. (pass_vsetvl::compute_global_backward_infos): Ditto. (pass_vsetvl::backward_demand_fusion): Ditto. (pass_vsetvl::forward_demand_fusion): Ditto. (pass_vsetvl::demand_fusion): New function. (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3. * config/riscv/riscv-vsetvl.h: New function declaration. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: Update testcase. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Ditto. Diff: --- gcc/config/riscv/riscv-vsetvl.cc | 137 +++++++++++++++++++-- gcc/config/riscv/riscv-vsetvl.h | 1 + .../riscv/rvv/vsetvl/vlmax_back_prop-27.c | 4 +- .../riscv/rvv/vsetvl/vlmax_back_prop-28.c | 4 +- .../riscv/rvv/vsetvl/vlmax_back_prop-45.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c | 14 +-- .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c | 12 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c | 12 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c | 1 - .../riscv/rvv/vsetvl/vlmax_switch_vtype-12.c | 2 +- 12 files changed, 155 insertions(+), 38 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 7e292f0dbdd..9ed081d0a72 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -43,7 +43,8 @@ along with GCC; see the file COPYING3. If not see - Phase 2 - Emit vsetvl instructions within each basic block according to demand, compute and save ANTLOC && AVLOC of each block. - - Phase 3 - Backward demanded info propagation and fusion across blocks. + - Phase 3 - Backward && forward demanded info propagation and fusion across + blocks. - Phase 4 - Lazy code motion including: compute local properties, pre_edge_lcm and vsetvl insertion && delete edges for LCM results. @@ -434,8 +435,12 @@ can_backward_propagate_p (const function_info *ssa, const basic_block cfg_bb, set_info *ultimate_def = look_through_degenerate_phi (set); const basic_block ultimate_bb = ultimate_def->bb ()->cfg_bb (); FOR_BB_BETWEEN (iter_bb, ultimate_bb, def->bb ()->cfg_bb (), next_bb) - if (iter_bb->index == cfg_bb->index) - return true; + { + if (!iter_bb) + break; + if (iter_bb->index == cfg_bb->index) + return true; + } return false; }; @@ -1172,6 +1177,19 @@ vector_insn_info::parse_insn (insn_info *insn) m_demands[DEMAND_MASK_POLICY] = true; } +void +vector_insn_info::set_demand_info (const vector_insn_info &other) +{ + set_sew (other.get_sew ()); + set_vlmul (other.get_vlmul ()); + set_ratio (other.get_ratio ()); + set_ta (other.get_ta ()); + set_ma (other.get_ma ()); + set_avl_info (other.get_avl_info ()); + for (size_t i = 0; i < NUM_DEMAND; i++) + m_demands[i] = other.demand_p ((enum demand_type) i); +} + void vector_insn_info::demand_vl_vtype () { @@ -1691,8 +1709,10 @@ private: void emit_local_forward_vsetvls (const bb_info *); /* Phase 3. */ - void merge_successors (const basic_block, const basic_block); - void compute_global_backward_infos (void); + bool merge_successors (const basic_block, const basic_block); + bool backward_demand_fusion (void); + bool forward_demand_fusion (void); + void demand_fusion (void); /* Phase 4. */ void prune_expressions (void); @@ -1866,7 +1886,7 @@ pass_vsetvl::emit_local_forward_vsetvls (const bb_info *bb) } /* Merge all successors of Father except child node. */ -void +bool pass_vsetvl::merge_successors (const basic_block father, const basic_block child) { @@ -1878,6 +1898,7 @@ pass_vsetvl::merge_successors (const basic_block father, gcc_assert (father_info.reaching_out.dirty_p () || father_info.reaching_out.empty_p ()); + bool changed_p = false; FOR_EACH_EDGE (e, ei, father->succs) { const basic_block succ = e->dest; @@ -1907,12 +1928,15 @@ pass_vsetvl::merge_successors (const basic_block father, father_info.local_dem = new_info; father_info.reaching_out = new_info; + changed_p = true; } + + return changed_p; } /* Compute global backward demanded info. */ -void -pass_vsetvl::compute_global_backward_infos (void) +bool +pass_vsetvl::backward_demand_fusion (void) { /* We compute global infos by backward propagation. We want to have better performance in these following cases: @@ -1939,6 +1963,7 @@ pass_vsetvl::compute_global_backward_infos (void) We backward propagate the first VSETVL into e32,mf2 so that we could be able to eliminate the second VSETVL in LCM. */ + bool changed_p = false; for (const bb_info *bb : crtl->ssa->reverse_bbs ()) { basic_block cfg_bb = bb->cfg_bb (); @@ -1982,9 +2007,10 @@ pass_vsetvl::compute_global_backward_infos (void) block_info.reaching_out.set_dirty (); block_info.reaching_out.set_dirty_pat (new_pat); block_info.local_dem = block_info.reaching_out; + changed_p = true; } - merge_successors (e->src, cfg_bb); + changed_p |= merge_successors (e->src, cfg_bb); } else if (block_info.reaching_out.dirty_p ()) { @@ -2011,6 +2037,7 @@ pass_vsetvl::compute_global_backward_infos (void) new_info.set_dirty_pat (new_pat); block_info.local_dem = new_info; block_info.reaching_out = new_info; + changed_p = true; } else { @@ -2031,9 +2058,99 @@ pass_vsetvl::compute_global_backward_infos (void) if (block_info.local_dem == block_info.reaching_out) block_info.local_dem = new_info; block_info.reaching_out = new_info; + changed_p = true; } } } + return changed_p; +} + +/* Compute global forward demanded info. */ +bool +pass_vsetvl::forward_demand_fusion (void) +{ + /* Enhance the global information propagation especially + backward propagation miss the propagation. + Consider such case: + + bb0 + (TU) + / \ + bb1 bb2 + (TU) (ANY) + existing edge -----> \ / (TU) <----- LCM create this edge. + bb3 + (TU) + + Base on the situation, LCM fails to eliminate the VSETVL instruction and + insert an edge from bb2 to bb3 since we can't backward propagate bb3 into + bb2. To avoid this confusing LCM result and non-optimal codegen, we should + forward propagate information from bb0 to bb2 which is friendly to LCM. */ + bool changed_p = false; + for (const bb_info *bb : crtl->ssa->bbs ()) + { + basic_block cfg_bb = bb->cfg_bb (); + const auto &prop + = m_vector_manager->vector_block_infos[cfg_bb->index].reaching_out; + + /* If there is nothing to propagate, just skip it. */ + if (!prop.valid_or_dirty_p ()) + continue; + + edge e; + edge_iterator ei; + /* Forward propagate to each successor. */ + FOR_EACH_EDGE (e, ei, cfg_bb->succs) + { + auto &local_dem + = m_vector_manager->vector_block_infos[e->dest->index].local_dem; + auto &reaching_out + = m_vector_manager->vector_block_infos[e->dest->index].reaching_out; + + /* It's quite obvious, we don't need to propagate itself. */ + if (e->dest->index == cfg_bb->index) + continue; + + /* If there is nothing to propagate, just skip it. */ + if (!local_dem.valid_or_dirty_p ()) + continue; + + if (prop > local_dem) + { + if (local_dem.dirty_p ()) + { + gcc_assert (local_dem == reaching_out); + rtx dirty_pat + = gen_vsetvl_pat (prop.get_insn ()->rtl (), prop); + local_dem = prop; + local_dem.set_dirty (); + local_dem.set_dirty_pat (dirty_pat); + reaching_out = local_dem; + } + else + { + if (reaching_out == local_dem) + reaching_out.set_demand_info (prop); + local_dem.set_demand_info (prop); + change_vsetvl_insn (local_dem.get_insn (), prop); + } + changed_p = true; + } + } + } + return changed_p; +} + +void +pass_vsetvl::demand_fusion (void) +{ + bool changed_p = true; + while (changed_p) + { + changed_p = false; + changed_p |= backward_demand_fusion (); + changed_p |= forward_demand_fusion (); + } if (dump_file) { @@ -2517,7 +2634,7 @@ pass_vsetvl::lazy_vsetvl (void) /* Phase 3 - Propagate demanded info across blocks. */ if (dump_file) fprintf (dump_file, "\nPhase 3: Demands propagation across blocks\n"); - compute_global_backward_infos (); + demand_fusion (); if (dump_file) m_vector_manager->dump (dump_file); diff --git a/gcc/config/riscv/riscv-vsetvl.h b/gcc/config/riscv/riscv-vsetvl.h index f05b16659d3..72a02289adb 100644 --- a/gcc/config/riscv/riscv-vsetvl.h +++ b/gcc/config/riscv/riscv-vsetvl.h @@ -273,6 +273,7 @@ public: void set_dirty () { m_state = DIRTY; } void set_dirty_pat (rtx pat) { m_dirty_pat = pat; } void set_insn (rtl_ssa::insn_info *insn) { m_insn = insn; } + void set_demand_info (const vector_insn_info &); bool demand_p (enum demand_type type) const { return m_demands[type]; } void demand (enum demand_type type) { m_demands[type] = true; } diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c index e148a1cc859..52e16d6a109 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c @@ -38,7 +38,7 @@ void f (void * restrict in, void * restrict out, void * restrict in2, void * res } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ @@ -48,4 +48,4 @@ void f (void * restrict in, void * restrict out, void * restrict in2, void * res /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 10 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c index e8340a63ee2..98df1fc7dab 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c @@ -40,7 +40,7 @@ void f (void * restrict in, void * restrict out, void * restrict in2, void * res } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ @@ -51,4 +51,4 @@ void f (void * restrict in, void * restrict out, void * restrict in2, void * res /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 10 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 11 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c index 0f6b96e6db6..3c2b5271e0c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c @@ -30,5 +30,5 @@ void foo5_5 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c index f87a8ccfad5..13aa25ec6b3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c @@ -563,10 +563,10 @@ void f7 (int8_t * restrict in, int8_t * restrict out, int n) } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c index c12385576cb..a5e065d012a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c @@ -483,10 +483,10 @@ void f6 (int8_t * restrict in, int8_t * restrict out, int n) } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c index 6265000a6e1..927595144ab 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c @@ -483,9 +483,9 @@ void f6 (int8_t * restrict in, int8_t * restrict out, int n) } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c index de7c5f95491..cbb4501605b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c @@ -83,4 +83,4 @@ void f6 (int8_t * restrict in, int8_t * restrict out, int n) } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c index f920017747b..ad89899f65c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c @@ -31,5 +31,5 @@ void f (int8_t * restrict in, int8_t * restrict out, int n) } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c index 05058b8c076..46f62927d0c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c @@ -23,4 +23,3 @@ void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, si /* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {j\s+\.L[0-9]+\s+\.L[0-9]+:\s+vlm\.v} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c index eaf69928d44..66c36ab24f8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c @@ -52,4 +52,4 @@ void foo (int8_t * restrict in, int8_t * restrict out, int n, int cond1, int con } } /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +