From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1971) id 7B0C03858C74; Fri, 27 Jan 2023 12:15:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7B0C03858C74 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1674821759; bh=DDtp/nl7LRa2OMhRa4sGi5Y8D8PuwwOQcF1dLdk8drw=; h=From:To:Subject:Date:From; b=ioduxXqAjKg+P7cj+It3lEX5Cp6kbvolpoxzv15JBPsJ41Wg3kuwlRgHXX+DfMIdV iN//G/wuw92mG3LQvenboBxPj72otg7221SdLTKu6tunQZ2MnqaiAVqiLPzQ8KRoZy G2UAlRb5KBW00L0DmoHQ+zjUsBQnBCBZFB092ViY= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Andre Simoes Dias Vieira To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-9073] arm: Fix MVE's vcmp vector-scalar patterns [PR107987] X-Act-Checkin: gcc X-Git-Author: Andre Vieira X-Git-Refname: refs/heads/releases/gcc-12 X-Git-Oldrev: e8000b7a0244e55f624709022883b1eadf335cf5 X-Git-Newrev: 27b6fb155dfefae8dc6ac8d8264851f104dff4e4 Message-Id: <20230127121559.7B0C03858C74@sourceware.org> Date: Fri, 27 Jan 2023 12:15:59 +0000 (GMT) List-Id: https://gcc.gnu.org/g:27b6fb155dfefae8dc6ac8d8264851f104dff4e4 commit r12-9073-g27b6fb155dfefae8dc6ac8d8264851f104dff4e4 Author: Andre Vieira Date: Tue Dec 6 12:06:33 2022 +0000 arm: Fix MVE's vcmp vector-scalar patterns [PR107987] This patch surrounds the scalar operand of the MVE vcmp patterns with a vec_duplicate to ensure both operands of the comparision operator have the same (vector) mode. gcc/ChangeLog: PR target/107987 * config/arm/mve.md (mve_vcmpq_n_, @mve_vcmpq_n_f): Apply vec_duplicate to scalar operand. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/pr107987.c: New test. (cherry picked from commit ed34c3bc3428bce663d42e9eeda10bc0c5d56d5c) Diff: --- gcc/config/arm/mve.md | 10 ++++++---- gcc/testsuite/gcc.target/arm/mve/pr107987.c | 11 +++++++++++ 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 01448717b7a..1d957dd2539 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -834,8 +834,9 @@ (define_insn "mve_vcmpq_n_" [ (set (match_operand: 0 "vpr_register_operand" "=Up") - (MVE_COMPARISONS: (match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r"))) + (MVE_COMPARISONS: + (match_operand:MVE_2 1 "s_register_operand" "w") + (vec_duplicate:MVE_2 (match_operand: 2 "s_register_operand" "r")))) ] "TARGET_HAVE_MVE" "vcmp.%# , %q1, %2" @@ -1924,8 +1925,9 @@ (define_insn "@mve_vcmpq_n_f" [ (set (match_operand: 0 "vpr_register_operand" "=Up") - (MVE_FP_COMPARISONS: (match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r"))) + (MVE_FP_COMPARISONS: + (match_operand:MVE_0 1 "s_register_operand" "w") + (vec_duplicate:MVE_0 (match_operand: 2 "s_register_operand" "r")))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" "vcmp.f%# , %q1, %2" diff --git a/gcc/testsuite/gcc.target/arm/mve/pr107987.c b/gcc/testsuite/gcc.target/arm/mve/pr107987.c new file mode 100644 index 00000000000..e19a3f2ec51 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/mve/pr107987.c @@ -0,0 +1,11 @@ +/* { dg-options "-O2" } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ + +#include + +uint32x4_t foo (uint32x4_t a, uint32x4_t b) +{ + mve_pred16_t p = vcmpneq_n_u32 (vandq_u32 (a, b), 0); + return vaddq_x_u32 (a, b, p); +}