From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1923) id A6DD13858D1E; Mon, 30 Jan 2023 14:50:27 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A6DD13858D1E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1675090227; bh=eGQDfbF1Q8ofby7zoifUdx4ZpI16Tlv7hhFgio6gUrY=; h=From:To:Subject:Date:From; b=CptZ0TRTPIBVF2fhHEU183tbbHN3nGuaFUowIWoJ5DWK5xYAIVZkX1UTeg+sdhA+5 Z1pKRm+dklIv0Ebcdlk9iq/KnsfD3Y4zGCF1o60hozUK3TZGu8QhfhpnizRNcZCLdY W5OuAP6ZNtciQ4pqlZGKxQLW0JWvJAEWxRW/YlZg= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Philipp Tomsich To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-5495] aarch64: Update Ampere-1A (-mcpu=ampere1a) to include SM4 X-Act-Checkin: gcc X-Git-Author: Philipp Tomsich X-Git-Refname: refs/heads/master X-Git-Oldrev: 7c4d1b7a44009c7b89f3aff6e014c4a19563e82e X-Git-Newrev: 1472ba52f3f94a626b62a93a1dc44ca448555ef8 Message-Id: <20230130145027.A6DD13858D1E@sourceware.org> Date: Mon, 30 Jan 2023 14:50:27 +0000 (GMT) List-Id: https://gcc.gnu.org/g:1472ba52f3f94a626b62a93a1dc44ca448555ef8 commit r13-5495-g1472ba52f3f94a626b62a93a1dc44ca448555ef8 Author: Philipp Tomsich Date: Wed Jan 25 20:15:14 2023 +0100 aarch64: Update Ampere-1A (-mcpu=ampere1a) to include SM4 gcc/ChangeLog: * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update ampere1a to include SM4. Diff: --- gcc/config/aarch64/aarch64-cores.def | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 2a0f52e1dd9..85fdfd8bf74 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -70,7 +70,7 @@ AARCH64_CORE("thunderxt83", thunderxt83, thunderx, V8A, (CRC, CRYPTO), thu /* Ampere Computing ('\xC0') cores. */ AARCH64_CORE("ampere1", ampere1, cortexa57, V8_6A, (F16, RNG, AES, SHA3), ampere1, 0xC0, 0xac3, -1) -AARCH64_CORE("ampere1a", ampere1a, cortexa57, V8_6A, (F16, RNG, AES, SHA3, MEMTAG), ampere1a, 0xC0, 0xac4, -1) +AARCH64_CORE("ampere1a", ampere1a, cortexa57, V8_6A, (F16, RNG, AES, SHA3, SM4, MEMTAG), ampere1a, 0xC0, 0xac4, -1) /* Do not swap around "emag" and "xgene1", this order is required to handle variant correctly. */ AARCH64_CORE("emag", emag, xgene1, V8A, (CRC, CRYPTO), emag, 0x50, 0x000, 3)