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From: Kito Cheng <kito@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r13-5515] RISC-V: Add vluxei32 C++ intrinsic API testcase
X-Act-Checkin: gcc
X-Git-Author: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
X-Git-Refname: refs/heads/master
X-Git-Oldrev: ed83c931db151f426d633adc6e61da9ed015d3db
X-Git-Newrev: c019f34e1f55cb2ce32cb79369251413c4ab7f86
Message-Id: <20230130164836.F156C3858417@sourceware.org>
Date: Mon, 30 Jan 2023 16:48:36 +0000 (GMT)
List-Id: <gcc-cvs.sourceware.org>

https://gcc.gnu.org/g:c019f34e1f55cb2ce32cb79369251413c4ab7f86

commit r13-5515-gc019f34e1f55cb2ce32cb79369251413c4ab7f86
Author: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Date:   Mon Jan 30 07:32:09 2023 +0800

    RISC-V: Add vluxei32 C++ intrinsic API testcase
    
    gcc/testsuite/ChangeLog:
    
            * g++.target/riscv/rvv/base/vluxei32-1.C: New test.
            * g++.target/riscv/rvv/base/vluxei32-2.C: New test.
            * g++.target/riscv/rvv/base/vluxei32-3.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_mu-1.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_mu-2.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_mu-3.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_tu-1.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_tu-2.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_tu-3.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_tum-1.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_tum-2.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_tum-3.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_tumu-1.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_tumu-2.C: New test.
            * g++.target/riscv/rvv/base/vluxei32_tumu-3.C: New test.

Diff:
---
 .../g++.target/riscv/rvv/base/vluxei32-1.C         | 608 +++++++++++++++++++++
 .../g++.target/riscv/rvv/base/vluxei32-2.C         | 608 +++++++++++++++++++++
 .../g++.target/riscv/rvv/base/vluxei32-3.C         | 608 +++++++++++++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_mu-1.C      | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_mu-2.C      | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_mu-3.C      | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_tu-1.C      | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_tu-2.C      | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_tu-3.C      | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_tum-1.C     | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_tum-2.C     | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_tum-3.C     | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_tumu-1.C    | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_tumu-2.C    | 307 +++++++++++
 .../g++.target/riscv/rvv/base/vluxei32_tumu-3.C    | 307 +++++++++++
 15 files changed, 5508 insertions(+)

diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-1.C
new file mode 100644
index 00000000000..8003397befd
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-1.C
@@ -0,0 +1,608 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32(const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint8mf4_t test___riscv_vluxei32(const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint8mf2_t test___riscv_vluxei32(const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint8m1_t test___riscv_vluxei32(const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint8m2_t test___riscv_vluxei32(const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint16mf4_t test___riscv_vluxei32(const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint16mf2_t test___riscv_vluxei32(const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint16m1_t test___riscv_vluxei32(const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint16m2_t test___riscv_vluxei32(const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint16m4_t test___riscv_vluxei32(const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint32mf2_t test___riscv_vluxei32(const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint32m1_t test___riscv_vluxei32(const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint32m2_t test___riscv_vluxei32(const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint32m4_t test___riscv_vluxei32(const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint32m8_t test___riscv_vluxei32(const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint64m1_t test___riscv_vluxei32(const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint64m2_t test___riscv_vluxei32(const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint64m4_t test___riscv_vluxei32(const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint64m8_t test___riscv_vluxei32(const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32(const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32(const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32(const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint8m1_t test___riscv_vluxei32(const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint8m2_t test___riscv_vluxei32(const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32(const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32(const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint16m1_t test___riscv_vluxei32(const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint16m2_t test___riscv_vluxei32(const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint16m4_t test___riscv_vluxei32(const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32(const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint32m1_t test___riscv_vluxei32(const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint32m2_t test___riscv_vluxei32(const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint32m4_t test___riscv_vluxei32(const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint32m8_t test___riscv_vluxei32(const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint64m1_t test___riscv_vluxei32(const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint64m2_t test___riscv_vluxei32(const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint64m4_t test___riscv_vluxei32(const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vuint64m8_t test___riscv_vluxei32(const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32(const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32(const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32(const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32(const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32(const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32(const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32(const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32(const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32(const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,vl);
+}
+
+
+vint8mf8_t test___riscv_vluxei32(vbool64_t mask,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint8mf4_t test___riscv_vluxei32(vbool32_t mask,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint8mf2_t test___riscv_vluxei32(vbool16_t mask,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint8m1_t test___riscv_vluxei32(vbool8_t mask,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint8m2_t test___riscv_vluxei32(vbool4_t mask,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint16mf4_t test___riscv_vluxei32(vbool64_t mask,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint16mf2_t test___riscv_vluxei32(vbool32_t mask,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint16m1_t test___riscv_vluxei32(vbool16_t mask,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint16m2_t test___riscv_vluxei32(vbool8_t mask,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint16m4_t test___riscv_vluxei32(vbool4_t mask,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint32mf2_t test___riscv_vluxei32(vbool64_t mask,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint32m1_t test___riscv_vluxei32(vbool32_t mask,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint32m2_t test___riscv_vluxei32(vbool16_t mask,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint32m4_t test___riscv_vluxei32(vbool8_t mask,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint32m8_t test___riscv_vluxei32(vbool4_t mask,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint64m1_t test___riscv_vluxei32(vbool64_t mask,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint64m2_t test___riscv_vluxei32(vbool32_t mask,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint64m4_t test___riscv_vluxei32(vbool16_t mask,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vint64m8_t test___riscv_vluxei32(vbool8_t mask,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32(vbool64_t mask,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32(vbool32_t mask,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32(vbool16_t mask,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint8m1_t test___riscv_vluxei32(vbool8_t mask,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint8m2_t test___riscv_vluxei32(vbool4_t mask,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32(vbool64_t mask,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32(vbool32_t mask,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint16m1_t test___riscv_vluxei32(vbool16_t mask,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint16m2_t test___riscv_vluxei32(vbool8_t mask,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint16m4_t test___riscv_vluxei32(vbool4_t mask,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32(vbool64_t mask,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint32m1_t test___riscv_vluxei32(vbool32_t mask,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint32m2_t test___riscv_vluxei32(vbool16_t mask,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint32m4_t test___riscv_vluxei32(vbool8_t mask,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint32m8_t test___riscv_vluxei32(vbool4_t mask,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint64m1_t test___riscv_vluxei32(vbool64_t mask,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint64m2_t test___riscv_vluxei32(vbool32_t mask,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint64m4_t test___riscv_vluxei32(vbool16_t mask,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vuint64m8_t test___riscv_vluxei32(vbool8_t mask,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32(vbool64_t mask,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32(vbool32_t mask,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32(vbool16_t mask,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32(vbool8_t mask,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32(vbool4_t mask,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32(vbool64_t mask,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32(vbool32_t mask,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32(vbool16_t mask,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32(vbool8_t mask,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-2.C
new file mode 100644
index 00000000000..57380cd0f2d
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-2.C
@@ -0,0 +1,608 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32(const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint8mf4_t test___riscv_vluxei32(const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint8mf2_t test___riscv_vluxei32(const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint8m1_t test___riscv_vluxei32(const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint8m2_t test___riscv_vluxei32(const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint16mf4_t test___riscv_vluxei32(const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint16mf2_t test___riscv_vluxei32(const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint16m1_t test___riscv_vluxei32(const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint16m2_t test___riscv_vluxei32(const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint16m4_t test___riscv_vluxei32(const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint32mf2_t test___riscv_vluxei32(const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint32m1_t test___riscv_vluxei32(const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint32m2_t test___riscv_vluxei32(const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint32m4_t test___riscv_vluxei32(const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint32m8_t test___riscv_vluxei32(const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint64m1_t test___riscv_vluxei32(const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint64m2_t test___riscv_vluxei32(const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint64m4_t test___riscv_vluxei32(const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint64m8_t test___riscv_vluxei32(const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32(const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32(const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32(const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint8m1_t test___riscv_vluxei32(const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint8m2_t test___riscv_vluxei32(const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32(const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32(const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint16m1_t test___riscv_vluxei32(const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint16m2_t test___riscv_vluxei32(const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint16m4_t test___riscv_vluxei32(const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32(const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint32m1_t test___riscv_vluxei32(const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint32m2_t test___riscv_vluxei32(const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint32m4_t test___riscv_vluxei32(const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint32m8_t test___riscv_vluxei32(const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint64m1_t test___riscv_vluxei32(const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint64m2_t test___riscv_vluxei32(const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint64m4_t test___riscv_vluxei32(const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vuint64m8_t test___riscv_vluxei32(const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32(const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32(const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32(const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32(const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32(const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32(const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32(const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32(const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32(const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,31);
+}
+
+
+vint8mf8_t test___riscv_vluxei32(vbool64_t mask,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint8mf4_t test___riscv_vluxei32(vbool32_t mask,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint8mf2_t test___riscv_vluxei32(vbool16_t mask,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint8m1_t test___riscv_vluxei32(vbool8_t mask,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint8m2_t test___riscv_vluxei32(vbool4_t mask,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint16mf4_t test___riscv_vluxei32(vbool64_t mask,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint16mf2_t test___riscv_vluxei32(vbool32_t mask,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint16m1_t test___riscv_vluxei32(vbool16_t mask,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint16m2_t test___riscv_vluxei32(vbool8_t mask,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint16m4_t test___riscv_vluxei32(vbool4_t mask,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint32mf2_t test___riscv_vluxei32(vbool64_t mask,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint32m1_t test___riscv_vluxei32(vbool32_t mask,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint32m2_t test___riscv_vluxei32(vbool16_t mask,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint32m4_t test___riscv_vluxei32(vbool8_t mask,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint32m8_t test___riscv_vluxei32(vbool4_t mask,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint64m1_t test___riscv_vluxei32(vbool64_t mask,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint64m2_t test___riscv_vluxei32(vbool32_t mask,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint64m4_t test___riscv_vluxei32(vbool16_t mask,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vint64m8_t test___riscv_vluxei32(vbool8_t mask,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32(vbool64_t mask,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32(vbool32_t mask,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32(vbool16_t mask,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint8m1_t test___riscv_vluxei32(vbool8_t mask,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint8m2_t test___riscv_vluxei32(vbool4_t mask,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32(vbool64_t mask,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32(vbool32_t mask,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint16m1_t test___riscv_vluxei32(vbool16_t mask,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint16m2_t test___riscv_vluxei32(vbool8_t mask,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint16m4_t test___riscv_vluxei32(vbool4_t mask,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32(vbool64_t mask,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint32m1_t test___riscv_vluxei32(vbool32_t mask,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint32m2_t test___riscv_vluxei32(vbool16_t mask,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint32m4_t test___riscv_vluxei32(vbool8_t mask,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint32m8_t test___riscv_vluxei32(vbool4_t mask,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint64m1_t test___riscv_vluxei32(vbool64_t mask,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint64m2_t test___riscv_vluxei32(vbool32_t mask,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint64m4_t test___riscv_vluxei32(vbool16_t mask,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vuint64m8_t test___riscv_vluxei32(vbool8_t mask,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32(vbool64_t mask,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32(vbool32_t mask,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32(vbool16_t mask,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32(vbool8_t mask,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32(vbool4_t mask,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32(vbool64_t mask,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32(vbool32_t mask,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32(vbool16_t mask,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32(vbool8_t mask,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-3.C
new file mode 100644
index 00000000000..be9a27ee5c1
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-3.C
@@ -0,0 +1,608 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32(const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint8mf4_t test___riscv_vluxei32(const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint8mf2_t test___riscv_vluxei32(const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint8m1_t test___riscv_vluxei32(const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint8m2_t test___riscv_vluxei32(const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint16mf4_t test___riscv_vluxei32(const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint16mf2_t test___riscv_vluxei32(const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint16m1_t test___riscv_vluxei32(const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint16m2_t test___riscv_vluxei32(const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint16m4_t test___riscv_vluxei32(const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint32mf2_t test___riscv_vluxei32(const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint32m1_t test___riscv_vluxei32(const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint32m2_t test___riscv_vluxei32(const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint32m4_t test___riscv_vluxei32(const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint32m8_t test___riscv_vluxei32(const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint64m1_t test___riscv_vluxei32(const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint64m2_t test___riscv_vluxei32(const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint64m4_t test___riscv_vluxei32(const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint64m8_t test___riscv_vluxei32(const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32(const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32(const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32(const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint8m1_t test___riscv_vluxei32(const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint8m2_t test___riscv_vluxei32(const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32(const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32(const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint16m1_t test___riscv_vluxei32(const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint16m2_t test___riscv_vluxei32(const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint16m4_t test___riscv_vluxei32(const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32(const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint32m1_t test___riscv_vluxei32(const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint32m2_t test___riscv_vluxei32(const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint32m4_t test___riscv_vluxei32(const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint32m8_t test___riscv_vluxei32(const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint64m1_t test___riscv_vluxei32(const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint64m2_t test___riscv_vluxei32(const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint64m4_t test___riscv_vluxei32(const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vuint64m8_t test___riscv_vluxei32(const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32(const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32(const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32(const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32(const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32(const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32(const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32(const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32(const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32(const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(base,bindex,32);
+}
+
+
+vint8mf8_t test___riscv_vluxei32(vbool64_t mask,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint8mf4_t test___riscv_vluxei32(vbool32_t mask,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint8mf2_t test___riscv_vluxei32(vbool16_t mask,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint8m1_t test___riscv_vluxei32(vbool8_t mask,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint8m2_t test___riscv_vluxei32(vbool4_t mask,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint16mf4_t test___riscv_vluxei32(vbool64_t mask,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint16mf2_t test___riscv_vluxei32(vbool32_t mask,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint16m1_t test___riscv_vluxei32(vbool16_t mask,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint16m2_t test___riscv_vluxei32(vbool8_t mask,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint16m4_t test___riscv_vluxei32(vbool4_t mask,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint32mf2_t test___riscv_vluxei32(vbool64_t mask,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint32m1_t test___riscv_vluxei32(vbool32_t mask,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint32m2_t test___riscv_vluxei32(vbool16_t mask,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint32m4_t test___riscv_vluxei32(vbool8_t mask,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint32m8_t test___riscv_vluxei32(vbool4_t mask,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint64m1_t test___riscv_vluxei32(vbool64_t mask,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint64m2_t test___riscv_vluxei32(vbool32_t mask,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint64m4_t test___riscv_vluxei32(vbool16_t mask,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vint64m8_t test___riscv_vluxei32(vbool8_t mask,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32(vbool64_t mask,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32(vbool32_t mask,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32(vbool16_t mask,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint8m1_t test___riscv_vluxei32(vbool8_t mask,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint8m2_t test___riscv_vluxei32(vbool4_t mask,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32(vbool64_t mask,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32(vbool32_t mask,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint16m1_t test___riscv_vluxei32(vbool16_t mask,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint16m2_t test___riscv_vluxei32(vbool8_t mask,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint16m4_t test___riscv_vluxei32(vbool4_t mask,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32(vbool64_t mask,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint32m1_t test___riscv_vluxei32(vbool32_t mask,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint32m2_t test___riscv_vluxei32(vbool16_t mask,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint32m4_t test___riscv_vluxei32(vbool8_t mask,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint32m8_t test___riscv_vluxei32(vbool4_t mask,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint64m1_t test___riscv_vluxei32(vbool64_t mask,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint64m2_t test___riscv_vluxei32(vbool32_t mask,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint64m4_t test___riscv_vluxei32(vbool16_t mask,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vuint64m8_t test___riscv_vluxei32(vbool8_t mask,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32(vbool64_t mask,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32(vbool32_t mask,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32(vbool16_t mask,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32(vbool8_t mask,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32(vbool4_t mask,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32(vbool64_t mask,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32(vbool32_t mask,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32(vbool16_t mask,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32(vbool8_t mask,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32(mask,base,bindex,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-1.C
new file mode 100644
index 00000000000..b6e3b5d210f
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-1.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-2.C
new file mode 100644
index 00000000000..4538c8c4c16
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-2.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-3.C
new file mode 100644
index 00000000000..540cf193b2f
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-3.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_mu(mask,merge,base,bindex,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-1.C
new file mode 100644
index 00000000000..4d68e87f62c
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-1.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_tu(vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_tu(vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_tu(vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint8m1_t test___riscv_vluxei32_tu(vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint8m2_t test___riscv_vluxei32_tu(vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_tu(vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_tu(vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint16m1_t test___riscv_vluxei32_tu(vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint16m2_t test___riscv_vluxei32_tu(vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint16m4_t test___riscv_vluxei32_tu(vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_tu(vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint32m1_t test___riscv_vluxei32_tu(vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint32m2_t test___riscv_vluxei32_tu(vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint32m4_t test___riscv_vluxei32_tu(vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint32m8_t test___riscv_vluxei32_tu(vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint64m1_t test___riscv_vluxei32_tu(vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint64m2_t test___riscv_vluxei32_tu(vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint64m4_t test___riscv_vluxei32_tu(vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vint64m8_t test___riscv_vluxei32_tu(vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_tu(vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_tu(vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_tu(vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_tu(vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_tu(vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_tu(vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_tu(vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_tu(vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_tu(vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_tu(vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_tu(vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_tu(vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_tu(vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_tu(vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_tu(vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_tu(vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_tu(vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_tu(vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_tu(vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_tu(vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_tu(vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_tu(vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_tu(vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_tu(vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_tu(vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_tu(vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_tu(vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_tu(vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-2.C
new file mode 100644
index 00000000000..20e27d419e5
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-2.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_tu(vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_tu(vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_tu(vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint8m1_t test___riscv_vluxei32_tu(vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint8m2_t test___riscv_vluxei32_tu(vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_tu(vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_tu(vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint16m1_t test___riscv_vluxei32_tu(vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint16m2_t test___riscv_vluxei32_tu(vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint16m4_t test___riscv_vluxei32_tu(vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_tu(vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint32m1_t test___riscv_vluxei32_tu(vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint32m2_t test___riscv_vluxei32_tu(vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint32m4_t test___riscv_vluxei32_tu(vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint32m8_t test___riscv_vluxei32_tu(vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint64m1_t test___riscv_vluxei32_tu(vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint64m2_t test___riscv_vluxei32_tu(vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint64m4_t test___riscv_vluxei32_tu(vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vint64m8_t test___riscv_vluxei32_tu(vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_tu(vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_tu(vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_tu(vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_tu(vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_tu(vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_tu(vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_tu(vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_tu(vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_tu(vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_tu(vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_tu(vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_tu(vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_tu(vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_tu(vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_tu(vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_tu(vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_tu(vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_tu(vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_tu(vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_tu(vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_tu(vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_tu(vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_tu(vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_tu(vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_tu(vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_tu(vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_tu(vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_tu(vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-3.C
new file mode 100644
index 00000000000..fda3a0b0f6b
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-3.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_tu(vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_tu(vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_tu(vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint8m1_t test___riscv_vluxei32_tu(vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint8m2_t test___riscv_vluxei32_tu(vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_tu(vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_tu(vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint16m1_t test___riscv_vluxei32_tu(vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint16m2_t test___riscv_vluxei32_tu(vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint16m4_t test___riscv_vluxei32_tu(vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_tu(vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint32m1_t test___riscv_vluxei32_tu(vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint32m2_t test___riscv_vluxei32_tu(vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint32m4_t test___riscv_vluxei32_tu(vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint32m8_t test___riscv_vluxei32_tu(vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint64m1_t test___riscv_vluxei32_tu(vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint64m2_t test___riscv_vluxei32_tu(vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint64m4_t test___riscv_vluxei32_tu(vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vint64m8_t test___riscv_vluxei32_tu(vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_tu(vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_tu(vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_tu(vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_tu(vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_tu(vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_tu(vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_tu(vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_tu(vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_tu(vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_tu(vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_tu(vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_tu(vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_tu(vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_tu(vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_tu(vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_tu(vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_tu(vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_tu(vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_tu(vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_tu(vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_tu(vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_tu(vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_tu(vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_tu(vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_tu(vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_tu(vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_tu(vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_tu(vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tu(merge,base,bindex,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-1.C
new file mode 100644
index 00000000000..a5966df712c
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-1.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-2.C
new file mode 100644
index 00000000000..c1b8c294334
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-2.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-3.C
new file mode 100644
index 00000000000..7acee6645e2
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-3.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tum(mask,merge,base,bindex,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-1.C
new file mode 100644
index 00000000000..e7562f406e4
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-1.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-2.C
new file mode 100644
index 00000000000..b8c8443c518
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-2.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-3.C
new file mode 100644
index 00000000000..05b70687993
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-3.C
@@ -0,0 +1,307 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vuint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vfloat32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+vfloat64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl)
+{
+    return __riscv_vluxei32_tumu(mask,merge,base,bindex,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */