From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id A33F03858D28; Tue, 31 Jan 2023 04:25:07 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A33F03858D28 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1675139107; bh=kNlNybK5WdzCXwDKiATSMFfOffkT4l6tNgRUKq7p5J4=; h=From:To:Subject:Date:From; b=n50BrBlEtJWWHah2aZfsGSjV0MXmIC6E1jc1RYKSmPJJ+8ge9SwFUhhv77n/RpF1N o/vhgzarx4qLl+bHKXJw5ln2NeXZNV22ZVx0KX587hGmqCBdwA3LFzanvuZBb4r26A uX1tKWtOBCDamzc7KTOQL4nfHilifXgnXGow/aAw= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-5525] RISC-V: Simplify testcase condition for RVV tests [NFC] X-Act-Checkin: gcc X-Git-Author: Kito Cheng X-Git-Refname: refs/heads/master X-Git-Oldrev: e08835fd3a4a6559b79c26db9b18df0e838d943e X-Git-Newrev: a190f583050630802438bce9aa854fdfa7a4433c Message-Id: <20230131042507.A33F03858D28@sourceware.org> Date: Tue, 31 Jan 2023 04:25:07 +0000 (GMT) List-Id: https://gcc.gnu.org/g:a190f583050630802438bce9aa854fdfa7a4433c commit r13-5525-ga190f583050630802438bce9aa854fdfa7a4433c Author: Kito Cheng Date: Tue Jan 31 11:48:51 2023 +0800 RISC-V: Simplify testcase condition for RVV tests [NFC] We got some trouble on some platform, it show get twice for the asm, but it only show once, seems like our pattern might be too complicated, so simplify that make every platform happey with those testcase. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Refine the scan condition. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: Ditto. Diff: --- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c | 2 +- 28 files changed, 28 insertions(+), 28 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c index cd58e53a822..be24067777c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,\.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,\.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c index 1aaebdf4bc4..81746e3ba38 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c index 813ea49e705..e29afbca622 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c index 9b59df9f78b..645ee6ff9b6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c index 35e4fd190af..c399bc2702f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c index 2330d34246f..25975316ce0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c @@ -214,4 +214,4 @@ void f7 (void * restrict in, void * restrict out, int n, int cond) /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s+\.L[0-9]+\:\s+vlm\.v\s+v[0-9]+,0\([a-x0-9]+\)} 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c index 687ecdf0fa3..aaf5c4b85f4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c index d644fb69955..c2e97127e6d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c index ea4d95554bc..580123ad68c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c index cbbffb78966..2154a51ba61 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c index 21d5cc91310..c707b79f2c8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c index 39d523b6676..d8f2ec09492 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c index 29dd2d6a774..ab2e5bbe2ab 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c index 286a7439fb6..2ac518c0fc2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c index 4cd8a5dfc79..337fb03ebb1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c index 5825f12a577..1e11dc85e23 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c index e2b53313ee1..f3a8a489e95 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c index f40ff57f57f..dff0bf302a4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c index 26a9933e8e2..37f053b7e8a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c index 7028d9118bb..4b1dab678fe 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c @@ -37,4 +37,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c index aa4c1a7f51d..9df26090d73 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c @@ -234,4 +234,4 @@ void f7 (void * restrict in, void * restrict out, int n, int cond) /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vlm\.v\s*(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vlm\.v\s*v[0-9]+,0\([a-x0-9]+\)} 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c index 41585d012e1..01ebc55e818 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c index d4890e31ff0..3b315aa4094 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c index 53905fca6fe..021054eb69f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c index 4d56ec53540..158c50a17a5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c index f722ec49c02..11911062f27 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c index 69bd0be5fd6..6239bdf9812 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c index 208173fb4bb..d276b8a7cbe 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c @@ -34,4 +34,4 @@ void f (void * restrict in, void * restrict out, int n, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ -/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */