From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 891D938582A3; Wed, 1 Feb 2023 03:10:26 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 891D938582A3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1675221026; bh=mDlLp/yf3NJA+hykWj2neF4iJVw7GyEGxSzAmECtlCE=; h=From:To:Subject:Date:From; b=yg1KuYQI5fVgdcJLgBhRiZYGBZDgk3c95784urZYDGR0Yduq6hQwYC6PuEMYqd/r+ 7lyNKh3y2Xr3MLwYZiz8QzSrIYQO7VSu8OauP4Mb/kcRQHPc3QfPdxPnIT9YXeFMDG WD9ssEINPjsAKoqRaghS6AKLVGqHZn+36+8L7rQ4= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/dmf007)] Update ChangeLog.meissner X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/dmf007 X-Git-Oldrev: 79fbfd2c5bc64e7e705f86cac8da29c04187000d X-Git-Newrev: 3f0725b61d02f647c03378cd536e83796212aef0 Message-Id: <20230201031026.891D938582A3@sourceware.org> Date: Wed, 1 Feb 2023 03:10:26 +0000 (GMT) List-Id: https://gcc.gnu.org/g:3f0725b61d02f647c03378cd536e83796212aef0 commit 3f0725b61d02f647c03378cd536e83796212aef0 Author: Michael Meissner Date: Tue Jan 31 22:10:23 2023 -0500 Update ChangeLog.meissner Diff: --- gcc/ChangeLog.meissner | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index a0d78e0f5aa..c361afa4260 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,31 @@ +==================== dmf007, patch #38 ==================== + +Bump up precision size to 11 bits. + +The new __dmr type that is being added as a possible future PowerPC instruction +set bumps into a structure field size issue. The size of the __dmr type is 1024 bits. +The precision field in tree_type_common is currently 10 bits, so if you store +1,024 into field, you get a 0 back. When you get 0 in the precision field, the +ccp pass passes this 0 to sext_hwi in hwint.h. That function in turn generates +a shift that is equal to the host wide int bit size, which is undefined as +machine dependent for shifting in C/C++. + + int shift = HOST_BITS_PER_WIDE_INT - prec; + return ((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) src << shift)) >> shift; + +It turns out the x86_64 where I first did my tests returns the original input +before the two shifts, while the PowerPC always returns 0. In the ccp pass, the +original input is -1, and so it worked. When I did the runs on the PowerPC, the +result was 0, which ultimately led to the failure. + +2023-01-31 Michael Meissner + +gcc/ + + * hwint.h (sext_hwi): Add assertion against precision 0. + * tree-core.h (tree_type_common): Bump up precision field by 1 bit, and + reduce contains_placeholder_bits to 1 bit. + ==================== dmf007, patch #37 ==================== Support load/store vector with right length.