From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1130) id 88538385842C; Thu, 2 Feb 2023 14:53:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 88538385842C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1675349636; bh=Tm7L0AWV0OkTHHNpIclfTKZd+/TzoJDdgfE6dPZAcUc=; h=From:To:Subject:Date:From; b=R55PXncZnGFKVky8li2Bypt5AJIFND6fjETJ37UqatXttBmwn3VPObIcmaO9H0whf fZpoLEOurlEctSynzzRPDjrn/msx9rdF1aM8HycQrt8XhnA7WdnFNMjp8FrKNgPs5K 2xfHEaAWzrecY22TbevMHg3830lI3C4B7UF88NXM= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Richard Sandiford To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-5658] rtl-ssa: Extend m_num_defs to a full unsigned int [PR108086] X-Act-Checkin: gcc X-Git-Author: Richard Sandiford X-Git-Refname: refs/heads/trunk X-Git-Oldrev: f4e1b46618ef3bd7933992ab79f663ab9112bb80 X-Git-Newrev: cd41085a37b8288dbdfe0f81027ce04b978578f1 Message-Id: <20230202145356.88538385842C@sourceware.org> Date: Thu, 2 Feb 2023 14:53:56 +0000 (GMT) List-Id: https://gcc.gnu.org/g:cd41085a37b8288dbdfe0f81027ce04b978578f1 commit r13-5658-gcd41085a37b8288dbdfe0f81027ce04b978578f1 Author: Richard Sandiford Date: Thu Feb 2 14:53:34 2023 +0000 rtl-ssa: Extend m_num_defs to a full unsigned int [PR108086] insn_info tried to save space by storing the number of definitions in a 16-bit bitfield. The justification was: // ... FIRST_PSEUDO_REGISTER + 1 // is the maximum number of accesses to hard registers and memory, and // MAX_RECOG_OPERANDS is the maximum number of pseudos that can be // defined by an instruction, so the number of definitions should fit // easily in 16 bits. But while that reasoning holds (I think) for real instructions, it doesn't hold for artificial instructions. I don't think there's any sensible higher limit we can use, so this patch goes for a full unsigned int. gcc/ PR rtl-optimization/108086 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int. Adjust size-related commentary accordingly. Diff: --- gcc/rtl-ssa/insns.h | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/gcc/rtl-ssa/insns.h b/gcc/rtl-ssa/insns.h index ffaf22d4b8e..a604fe295cd 100644 --- a/gcc/rtl-ssa/insns.h +++ b/gcc/rtl-ssa/insns.h @@ -141,7 +141,7 @@ using insn_call_clobbers_tree = default_splay_tree; // of "notes", a bit like REG_NOTES for the underlying RTL insns. class insn_info { - // Size: 8 LP64 words. + // Size: 9 LP64 words. friend class ebb_info; friend class function_info; @@ -401,10 +401,11 @@ private: // The number of definitions and the number uses. FIRST_PSEUDO_REGISTER + 1 // is the maximum number of accesses to hard registers and memory, and // MAX_RECOG_OPERANDS is the maximum number of pseudos that can be - // defined by an instruction, so the number of definitions should fit - // easily in 16 bits. + // defined by an instruction, so the number of definitions in a real + // instruction should fit easily in 16 bits. However, there are no + // limits on the number of definitions in artifical instructions. unsigned int m_num_uses; - unsigned int m_num_defs : 16; + unsigned int m_num_defs; // Flags returned by the accessors above. unsigned int m_is_debug_insn : 1; @@ -414,7 +415,7 @@ private: unsigned int m_has_volatile_refs : 1; // For future expansion. - unsigned int m_spare : 11; + unsigned int m_spare : 27; // The program point at which the instruction occurs. // @@ -431,6 +432,9 @@ private: // instruction. mutable int m_cost_or_uid; + // On LP64 systems, there's a gap here that could be used for future + // expansion. + // The list of notes that have been attached to the instruction. insn_note *m_first_note; };