From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1363) id DD78F3858D28; Wed, 15 Feb 2023 20:35:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DD78F3858D28 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1676493350; bh=AdMGBmHJWcDDjyz9bEg+/qtNjX/zmpZShTTdn1tzhSE=; h=From:To:Subject:Date:From; b=ZSM4DwDEIzzMzfILpxYbfh96B8e/HCLPUycWhXJB9KS+OM8olDM8w1XQIxjbjqMeW +2H84K6ub974F5uFzkiaYIaxNYG3Ne1AUjnSW//Qv0eaG4MOfHNHKTLPbq8Q1Q/auQ 8X2/mht792rjgVb9sfXa5hjgFiOIpvDuzP1ckAGk= MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="utf-8" From: Uros Bizjak To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-6065] i386: Relax extract location operand mode requirements X-Act-Checkin: gcc X-Git-Author: Uros Bizjak X-Git-Refname: refs/heads/master X-Git-Oldrev: b03a10b0b25cef4928ccead4c8a461d3674dbe86 X-Git-Newrev: a3e499430f1cc8a8f4aea3c26d4aba2d5eaba742 Message-Id: <20230215203550.DD78F3858D28@sourceware.org> Date: Wed, 15 Feb 2023 20:35:50 +0000 (GMT) List-Id: https://gcc.gnu.org/g:a3e499430f1cc8a8f4aea3c26d4aba2d5eaba742 commit r13-6065-ga3e499430f1cc8a8f4aea3c26d4aba2d5eaba742 Author: Uros Bizjak Date: Wed Feb 15 21:34:59 2023 +0100 i386: Relax extract location operand mode requirements There is no requirement on the mode of the location operand, so any supported integer mode is valid. We can relax extract location operand mode requirement of other patterns involving zero_extract RTX. 2023-02-15 Uroš Bizjak gcc/ChangeLog: * config/i386/i386.md (*cmpqi_ext_1): Use int248_register_operand predicate in zero_extract sub-RTX. (*cmpqi_ext_2): Ditto. (*cmpqi_ext_3): Ditto. (*cmpqi_ext_4): Ditto. (*extzvqi_mem_rex64): Ditto. (*extzvqi): Ditto. (*insvqi_1_mem_rex64): Ditto. (@insv_1): Ditto. (*insvqi_1): Ditto. (*insvqi_2): Ditto. (*insvqi_3): Ditto. (*extendqi_ext_1): Ditto. (*addqi_ext_1): Ditto. (*addqi_ext_2): Ditto. (*subqi_ext_2): Ditto. (*testqi_ext_1): Ditto. (*testqi_ext_2): Ditto. (*andqi_ext_1): Ditto. (*andqi_ext_1_cc): Ditto. (*andqi_ext_2): Ditto. (*qi_ext_1): Ditto. (*qi_ext_2): Ditto. (*xorqi_ext_1_cc): Ditto. (*negqi_ext_2): Ditto. (*ashlqi_ext_2): Ditto. (*qi_ext_2): Ditto. Diff: --- gcc/config/i386/i386.md | 134 ++++++++++++++++++++++++------------------------ 1 file changed, 67 insertions(+), 67 deletions(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index e37bc8dca53..198f06e0769 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1459,7 +1459,7 @@ (match_operand:QI 0 "nonimmediate_operand" "QBc,m") (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q,Q") + (match_operand 1 "int248_register_operand" "Q,Q") (const_int 8) (const_int 8)) 0)))] "ix86_match_ccmode (insn, CCmode)" @@ -1473,7 +1473,7 @@ (compare (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q") + (match_operand 0 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0) (match_operand:QI 1 "const0_operand")))] @@ -1498,7 +1498,7 @@ (compare (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q,Q") + (match_operand 0 "int248_register_operand" "Q,Q") (const_int 8) (const_int 8)) 0) (match_operand:QI 1 "general_operand" "QnBc,m")))] @@ -1513,12 +1513,12 @@ (compare (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q") + (match_operand 0 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)))] "ix86_match_ccmode (insn, CCmode)" @@ -3192,7 +3192,7 @@ [(set (match_operand:QI 0 "norex_memory_operand" "=Bn") (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0))] "TARGET_64BIT && reload_completed" @@ -3214,7 +3214,7 @@ [(set (match_operand:QI 0 "nonimmediate_operand" "=QBc,?R,m") (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q,Q,Q") + (match_operand 1 "int248_register_operand" "Q,Q,Q") (const_int 8) (const_int 8)) 0))] "" @@ -3242,7 +3242,7 @@ (define_peephole2 [(set (match_operand:QI 0 "register_operand") (subreg:QI - (zero_extract:SWI248 (match_operand:SWI248 1 "register_operand") + (zero_extract:SWI248 (match_operand 1 "int248_register_operand") (const_int 8) (const_int 8)) 0)) (set (match_operand:QI 2 "norex_memory_operand") (match_dup 0))] @@ -3289,7 +3289,7 @@ (define_insn "*insvqi_1_mem_rex64" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 @@ -3301,7 +3301,7 @@ (define_insn "@insv_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (match_operand:SWI248 1 "general_operand" "QnBc,m"))] @@ -3317,7 +3317,7 @@ (define_insn "*insvqi_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 @@ -3331,7 +3331,7 @@ (define_peephole2 [(set (match_operand:QI 0 "register_operand") (match_operand:QI 1 "norex_memory_operand")) - (set (zero_extract:SWI248 (match_operand:SWI248 2 "register_operand") + (set (zero_extract:SWI248 (match_operand 2 "int248_register_operand") (const_int 8) (const_int 8)) (subreg:SWI248 (match_dup 0) 0))] @@ -3347,7 +3347,7 @@ [(parallel [(set (match_operand:SWI48 0 "general_reg_operand") (const_int 0)) (clobber (reg:CC FLAGS_REG))]) - (set (zero_extract:SWI248 (match_operand:SWI248 1 "general_reg_operand") + (set (zero_extract:SWI248 (match_operand 1 "int248_register_operand") (const_int 8) (const_int 8)) (const_int 0))] @@ -3360,7 +3360,7 @@ (define_peephole2 [(set (match_operand:SWI48 0 "general_reg_operand") (match_operand:SWI48 1 "const_int_operand")) - (set (zero_extract:SWI248 (match_operand:SWI248 2 "general_reg_operand") + (set (zero_extract:SWI248 (match_operand 2 "int248_register_operand") (const_int 8) (const_int 8)) (match_operand:SWI248 3 "const_int_operand"))] @@ -3378,11 +3378,11 @@ (define_insn "*insvqi_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (any_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)))] "" @@ -3392,7 +3392,7 @@ (define_insn "*insvqi_3" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (any_shiftrt:SWI248 @@ -4783,7 +4783,7 @@ (sign_extend:SWI24 (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)))] "" @@ -6657,14 +6657,14 @@ (define_insn "*addqi_ext_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 (plus:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) 0)) @@ -6696,19 +6696,19 @@ (define_insn "*addqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (plus:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "%0") + (match_operand 1 "int248_register_operand" "%0") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 2 "register_operand" "Q") + (match_operand 2 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -7267,19 +7267,19 @@ (define_insn "*subqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (minus:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0") + (match_operand 1 "int248_register_operand" "0") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 2 "register_operand" "Q") + (match_operand 2 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -9866,7 +9866,7 @@ (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q,Q") + (match_operand 0 "int248_register_operand" "Q,Q") (const_int 8) (const_int 8)) 0) (match_operand:QI 1 "general_operand" "QnBc,m")) @@ -9883,12 +9883,12 @@ (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q") + (match_operand 0 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) (const_int 0)))] @@ -10086,13 +10086,13 @@ (match_op_dup 1 [(and:QI (subreg:QI - (zero_extract:SI (match_dup 2) + (zero_extract:HI (match_dup 2) (const_int 8) (const_int 8)) 0) (match_dup 3)) (const_int 0)]))] { - operands[2] = gen_lowpart (SImode, operands[2]); + operands[2] = gen_lowpart (HImode, operands[2]); operands[3] = gen_int_mode (INTVAL (operands[3]) >> 8, QImode); }) @@ -10417,21 +10417,21 @@ "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && reload_completed" [(parallel - [(set (zero_extract:SI (match_dup 0) + [(set (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) - (subreg:SI + (subreg:HI (xor:QI (subreg:QI - (zero_extract:SI (match_dup 0) + (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) 0) (subreg:QI - (zero_extract:SI (match_dup 0) + (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))])] - "operands[0] = gen_lowpart (SImode, operands[0]);") + "operands[0] = gen_lowpart (HImode, operands[0]);") (define_insn "*anddi_2" [(set (reg FLAGS_REG) @@ -10544,14 +10544,14 @@ (define_insn "*andqi_ext_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) 0)) @@ -10571,13 +10571,13 @@ (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) (const_int 0))) (set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 @@ -10598,19 +10598,19 @@ (define_insn "*andqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "%0") + (match_operand 1 "int248_register_operand" "%0") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 2 "register_operand" "Q") + (match_operand 2 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -10635,20 +10635,20 @@ && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && !(~INTVAL (operands[2]) & ~(255 << 8))" [(parallel - [(set (zero_extract:SI (match_dup 0) + [(set (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) - (subreg:SI + (subreg:HI (and:QI (subreg:QI - (zero_extract:SI (match_dup 1) + (zero_extract:HI (match_dup 1) (const_int 8) (const_int 8)) 0) (match_dup 2)) 0)) (clobber (reg:CC FLAGS_REG))])] { - operands[0] = gen_lowpart (SImode, operands[0]); - operands[1] = gen_lowpart (SImode, operands[1]); + operands[0] = gen_lowpart (HImode, operands[0]); + operands[1] = gen_lowpart (HImode, operands[1]); operands[2] = gen_int_mode (INTVAL (operands[2]) >> 8, QImode); }) @@ -11271,14 +11271,14 @@ (define_insn "*qi_ext_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 (any_or:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) 0)) @@ -11293,19 +11293,19 @@ (define_insn "*qi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (any_or:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "%0") + (match_operand 1 "int248_register_operand" "%0") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 2 "register_operand" "Q") + (match_operand 2 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -11331,13 +11331,13 @@ && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && !(INTVAL (operands[2]) & ~(255 << 8))" [(parallel - [(set (zero_extract:SI (match_dup 0) + [(set (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) - (subreg:SI + (subreg:HI (any_or:QI (subreg:QI - (zero_extract:SI (match_dup 1) + (zero_extract:HI (match_dup 1) (const_int 8) (const_int 8)) 0) (match_dup 2)) 0)) @@ -11352,8 +11352,8 @@ emit_note (NOTE_INSN_DELETED); DONE; } - operands[0] = gen_lowpart (SImode, operands[0]); - operands[1] = gen_lowpart (SImode, operands[1]); + operands[0] = gen_lowpart (HImode, operands[0]); + operands[1] = gen_lowpart (HImode, operands[1]); operands[2] = gen_int_mode (INTVAL (operands[2]) >> 8, QImode); }) @@ -11406,13 +11406,13 @@ (xor:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) (const_int 0))) (set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 @@ -11809,14 +11809,14 @@ (define_insn "*negqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (neg:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0") + (match_operand 1 "int248_register_operand" "0") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -13370,14 +13370,14 @@ (define_insn "*ashlqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (ashift:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0") + (match_operand 1 "int248_register_operand" "0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "nonmemory_operand" "cI")) 0)) @@ -14273,14 +14273,14 @@ (define_insn "*qi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (any_shiftrt:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0") + (match_operand 1 "int248_register_operand" "0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "nonmemory_operand" "cI")) 0)) @@ -23135,7 +23135,7 @@ (match_operator 1 "compare_operator" [(and:QI (subreg:QI - (zero_extract:SWI248 (match_operand:SWI248 2 "QIreg_operand") + (zero_extract:SWI248 (match_operand 2 "int248_register_operand") (const_int 8) (const_int 8)) 0) (match_operand 3 "const_int_operand"))