From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id 8EADE385B519; Fri, 17 Feb 2023 02:47:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8EADE385B519 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1676602039; bh=tG4d7K4PjfyWUbundFlHxUAjOw4guxdIWMdClBqP8bI=; h=From:To:Subject:Date:From; b=OeGZo0+BorESFpt+UX+lysmKGOtcbPrQRS3HeReZJ4ves8BDbkcGywbac91Qr40i4 Z2iJMz4lTBMB4eLgdFFL7x1iBzUhWs7YSrH9rx1/SQa6ujA3BZ7IMsH2KcKTzOXs30 e0vXbAcanV02yIro8tRs7ayqdoHwCoEk/UWOcDzo= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-6109] RISC-V: Rename tu_preds to none_tu_preds [NFC] X-Act-Checkin: gcc X-Git-Author: Ju-Zhe Zhong X-Git-Refname: refs/heads/master X-Git-Oldrev: 3cb0fa12126a287160dedec4fa9ab3e4425bf619 X-Git-Newrev: c2031252868015f8a8ad1c67362a8b37ce6f8030 Message-Id: <20230217024719.8EADE385B519@sourceware.org> Date: Fri, 17 Feb 2023 02:47:19 +0000 (GMT) List-Id: https://gcc.gnu.org/g:c2031252868015f8a8ad1c67362a8b37ce6f8030 commit r13-6109-gc2031252868015f8a8ad1c67362a8b37ce6f8030 Author: Ju-Zhe Zhong Date: Wed Feb 15 19:22:31 2023 +0800 RISC-V: Rename tu_preds to none_tu_preds [NFC] To be consistent with other naming of preds array variable. Change tu_preds into none_tu_preds which indicate such preds include vop and vop_tu combinations. gcc/ChangeLog: * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename. (vsbc): Ditto. (vmerge): Ditto. (vmv_v): Ditto. * config/riscv/riscv-vector-builtins.cc: Ditto. Diff: --- gcc/config/riscv/riscv-vector-builtins-functions.def | 16 ++++++++-------- gcc/config/riscv/riscv-vector-builtins.cc | 2 +- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/gcc/config/riscv/riscv-vector-builtins-functions.def b/gcc/config/riscv/riscv-vector-builtins-functions.def index 9bad1373bfd..e6c19691d17 100644 --- a/gcc/config/riscv/riscv-vector-builtins-functions.def +++ b/gcc/config/riscv/riscv-vector-builtins-functions.def @@ -113,14 +113,14 @@ DEF_RVV_FUNCTION (vsext, alu, full_preds, i_vf4_ops) DEF_RVV_FUNCTION (vsext, alu, full_preds, i_vf8_ops) // 11.4. Vector Integer Add-with-Carry/Subtract-with-Borrow Instructions -DEF_RVV_FUNCTION (vadc, no_mask_policy, tu_preds, iu_vvvm_ops) -DEF_RVV_FUNCTION (vadc, no_mask_policy, tu_preds, iu_vvxm_ops) +DEF_RVV_FUNCTION (vadc, no_mask_policy, none_tu_preds, iu_vvvm_ops) +DEF_RVV_FUNCTION (vadc, no_mask_policy, none_tu_preds, iu_vvxm_ops) DEF_RVV_FUNCTION (vmadc, return_mask, none_preds, iu_mvvm_ops) DEF_RVV_FUNCTION (vmadc, return_mask, none_preds, iu_mvxm_ops) DEF_RVV_FUNCTION (vmadc, return_mask, none_preds, iu_mvv_ops) DEF_RVV_FUNCTION (vmadc, return_mask, none_preds, iu_mvx_ops) -DEF_RVV_FUNCTION (vsbc, no_mask_policy, tu_preds, iu_vvvm_ops) -DEF_RVV_FUNCTION (vsbc, no_mask_policy, tu_preds, iu_vvxm_ops) +DEF_RVV_FUNCTION (vsbc, no_mask_policy, none_tu_preds, iu_vvvm_ops) +DEF_RVV_FUNCTION (vsbc, no_mask_policy, none_tu_preds, iu_vvxm_ops) DEF_RVV_FUNCTION (vmsbc, return_mask, none_preds, iu_mvvm_ops) DEF_RVV_FUNCTION (vmsbc, return_mask, none_preds, iu_mvxm_ops) DEF_RVV_FUNCTION (vmsbc, return_mask, none_preds, iu_mvv_ops) @@ -230,12 +230,12 @@ DEF_RVV_FUNCTION (vwmaccsu, alu, full_preds, i_su_wwxv_ops) DEF_RVV_FUNCTION (vwmaccus, alu, full_preds, i_us_wwxv_ops) // 11.15. Vector Integer Merge Instructions -DEF_RVV_FUNCTION (vmerge, no_mask_policy, tu_preds, all_vvvm_ops) -DEF_RVV_FUNCTION (vmerge, no_mask_policy, tu_preds, iu_vvxm_ops) +DEF_RVV_FUNCTION (vmerge, no_mask_policy, none_tu_preds, all_vvvm_ops) +DEF_RVV_FUNCTION (vmerge, no_mask_policy, none_tu_preds, iu_vvxm_ops) // 11.16 Vector Integer Move Instructions -DEF_RVV_FUNCTION (vmv_v, move, tu_preds, all_v_ops) -DEF_RVV_FUNCTION (vmv_v, move, tu_preds, iu_x_ops) +DEF_RVV_FUNCTION (vmv_v, move, none_tu_preds, all_v_ops) +DEF_RVV_FUNCTION (vmv_v, move, none_tu_preds, iu_x_ops) /* 12. Vector Fixed-Point Arithmetic Instructions. */ diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc index 1047bd29fd6..4ca5a88cbea 100644 --- a/gcc/config/riscv/riscv-vector-builtins.cc +++ b/gcc/config/riscv/riscv-vector-builtins.cc @@ -481,7 +481,7 @@ static CONSTEXPR const predication_type_index full_preds[] PRED_TYPE_tumu, PRED_TYPE_mu, NUM_PRED_TYPES}; /* vop/vop_tu will be registered. */ -static CONSTEXPR const predication_type_index tu_preds[] +static CONSTEXPR const predication_type_index none_tu_preds[] = {PRED_TYPE_none, PRED_TYPE_tu, NUM_PRED_TYPES}; /* vop/vop_m will be registered. */